Datasheet

unsigned char sreg;
unsigned int i;
/* Save global interrupt flag */
sreg = SREG;
/* Disable interrupts */
_CLI();
/* Set TCNT1 to i */
TCNT1 = i;
/* Restore global interrupt flag */
SREG = sreg;
}
Note:
1. The example code assumes that the part specific header file is included. For I/O
registers located in extended I/O map, IN, OUT, SBIS, SBIC, CBI, and SBI
instructions must be replaced with instructions that allow access to extended I/O.
Typically LDS and STS combined with SBRS, SBRC, SBR, and CBR.
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9. About Code Examples
20.6.1 Reusing the Temporary High Byte Register
If writing to more than one 16-bit register where the high byte is the same for all registers written, the high
byte only needs to be written once. However, the same rule of atomic operation described previously also
applies in this case.
20.7 Timer/Counter Clock Sources
The timer/counter can be clocked by an internal or an external clock source. The clock source is selected
by the clock select logic, which is controlled by the clock select bits in the Timer/Counter Control Register
B (TCCR1B.CS[2:0]).
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20.13 Timer/Counter 0, 1 Prescalers
20.8 Counter Unit
The main part of the 16-bit timer/counter is the programmable 16-bit bi-directional counter unit, as shown
in the block diagram:
Figure 20-2. Counter Unit Block Diagram
TEMP (8-bit)
DATA BUS (8-bit)
TCNTn (16-bit Counter)
TCNTnH (8-bit) TCNTnL (8-bit)
Control Logic
Count
Clear
Direction
TOVn
(Int.Req.)
Clock Select
TOP BOTTOM
Tn
Edge
Detector
( From Prescaler )
clk
Tn
Note: The “n” in the register and bit names indicates the device number (n = 1 for timer/counter 1), and
the “x” indicates output compare unit (A/B).
ATmega48PA/88PA/168PA
16-bit Timer/Counter1 (TC1) with PWM
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40002011A-page 166