Datasheet

84
ATmega8535(L)
2502K–AVR–10/06
When OC0 is connected to the pin, the function of the COM01:0 bits depends on the
WGM01:0 bit setting. Table 40 shows the COM01:0 bit functionality when the WGM01:0
bits are set to a normal or CTC mode (non-PWM).
Table 41 shows the COM01:0 bit functionality when the WGM01:0 bits are set to fast
PWM mode.
Note: 1. A special case occurs when OCR0 equals TOP and COM01 is set. In this case, the
Compare Match is ignored, but the set or clear is done at TOP. See “Fast PWM
Mode” on page 77 for more details.
Table 42 shows the COM01:0 bit functionality when the WGM01:0 bits are set to phase
correct PWM mode.
Note: 1. A special case occurs when OCR0 equals TOP and COM01 is set. In this case, the
Compare Match is ignored, but the set or clear is done at TOP. See “Phase Correct
PWM Mode” on page 79 for more details.
Table 40. Compare Output Mode, non-PWM Mode
COM01 COM00 Description
0 0 Normal port operation, OC0 disconnected.
0 1 Toggle OC0 on Compare Match
1 0 Clear OC0 on Compare Match
1 1 Set OC0 on Compare Match
Table 41. Compare Output Mode, Fast PWM Mode
(1)
COM01 COM00 Description
0 0 Normal port operation, OC0 disconnected.
01Reserved
1 0 Clear OC0 on Compare Match, set OC0 at TOP (Non-Inverting).
1 1 Set OC0 on Compare Match, clear OC0 at TOP (Inverting)
Table 42. Compare Output Mode, Phase Correct PWM Mode
(1)
COM01 COM00 Description
0 0 Normal port operation, OC0 disconnected.
01Reserved
1 0 Clear OC0 on Compare Match when up-counting. Set OC0 on Compare
Match when down-counting.
1 1 Set OC0 on Compare Match when up-counting. Clear OC0 on Compare
Match when down-counting.