Datasheet

ATmega8535(L)

2502K–AVR–10/06

Note: 1. The Boot Reset Address is shown in Table 93 on page 235. For the BOOTRST Fuse

“1” means unprogrammed while “0” means programmed.

The most typical and general program setup for the Reset and Interrupt Vector

Addresses in ATmega8535 is:

AddressLabels Code Comments

0x000 rjmp RESET ; Reset Handler

0x001 rjmp EXT_INT0 ; IRQ0 Handler

0x002 rjmp EXT_INT1 ; IRQ1 Handler

0x003 rjmp TIM2_COMP ; Timer2 Compare Handler

0x004 rjmp TIM2_OVF ; Timer2 Overflow Handler

0x005 rjmp TIM1_CAPT ; Timer1 Capture Handler

0x006 rjmp TIM1_COMPA ; Timer1 Compare A Handler

0x007 rjmp TIM1_COMPB ; Timer1 Compare B Handler

0x008 rjmp TIM1_OVF ; Timer1 Overflow Handler

0x009 rjmp TIM0_OVF ; Timer0 Overflow Handler

0x00A rjmp SPI_STC ; SPI Transfer Complete Handler

0x00B rjmp USART_RXC ; USART RX Complete Handler

0x00C rjmp USART_UDRE ; UDR Empty Handler

0x00D rjmp USART_TXC ; USART TX Complete Handler

0x00E rjmp ADC ; ADC Conversion Complete Handler

0x00F rjmp EE_RDY ; EEPROM Ready Handler

0x010 rjmp ANA_COMP ; Analog Comparator Handler

0x011 rjmp TWSI ; Two-wire Serial Interface Handler

0x012 rjmp EXT_INT2 ; IRQ2 Handler

0x013 rjmp TIM0_COMP ; Timer0 Compare Handler

0x014 rjmp SPM_RDY ; Store Program Memory Ready Handler

;

0x015 RESET: ldi r16,high(RAMEND) ; Main program start

0x016 out SPH,r16 ; Set Stack Pointer to top of RAM

0x017 ldi r16,low(RAMEND)

0x018 out SPL,r16

0x019 sei ; Enable interrupts

0x020 <instr> xxx

... ... ...

When the BOOTRST Fuse is unprogrammed, the Boot section size set to 2K bytes and

the IVSEL bit in the GICR Register is set before any interrupts are enabled, the most

typical and general program setup for the Reset and Interrupt Vector Addresses is:

Table 20. Reset and Interrupt Vectors Placement

BOOTRST

(1)

IVSEL Reset Address Interrupt Vectors Start Address

1 0 0x0000 0x0001

1 1 0x0000 Boot Reset Address + 0x0001

0 0 Boot Reset Address 0x0001

0 1 Boot Reset Address Boot Reset Address + 0x0001