Datasheet

65
ATmega8515(L)
2512G–AVR–03/05
Special Function IO Register –
SFIOR
• Bit 2 – PUD: Pull-up Disable
When this bit is written to one, the pull-ups in the I/O ports are disabled even if the DDxn
and PORTxn Registers are configured to enable the pull-ups ({DDxn, PORTxn} = 0b01).
See “Configuring the Pin” on page 59 for more details about this feature.
Alternate Functions of Port A Port A has an alternate function as the address low byte and data lines for the External
Memory Interface.
Table 27 and Table 28 relate the alternate functions of Port A to the overriding signals
shown in Figure 33 on page 63.
Note: 1. ADA is short for ADdress Active and represents the time when address is output. See
“External Memory Interface” on page 24.
Bit 7 6 5 4 3 2 1 0
– XMBK XMM2 XMM1 XMM0 PUD – PSR10 SFIOR
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Table 26. Port A Pins Alternate Functions
Port Pin Alternate Function
PA7 AD7 (External memory interface address and data bit 7)
PA6 AD6 (External memory interface address and data bit 6)
PA5 AD5 (External memory interface address and data bit 5)
PA4 AD4 (External memory interface address and data bit 4)
PA3 AD3 (External memory interface address and data bit 3)
PA2 AD2 (External memory interface address and data bit 2)
PA1 AD1 (External memory interface address and data bit 1)
PA0 AD0 (External memory interface address and data bit 0)
Table 27. Overriding Signals for Alternate Functions in PA7..PA4
Signal
Name PA7/AD7 PA6/AD6 PA5/AD5 PA4/AD4
PUOE SRE SRE SRE SRE
PUOV ~(WR
| ADA
(1)
) •
PortA7
~(WR | ADA) •
PortA6
~(WR | ADA) •
PortA5
~(WR | ADA) •
PortA4
DDOE SRE SRE SRE SRE
DDOV WR
| ADA WR | ADA WR | ADA WR | ADA
PVOE SRE SRE SRE SRE
PVOV A7 • ADA |
D7 OUTPUT • WR
A6 • ADA |
D6 OUTPUT •
WR
A5 • ADA |
D5 OUTPUT •
WR
A4 • ADA |
D4 OUTPUT •
WR
DIEOE0 000
DIEOV0 000
DI D7 INPUT D6 INPUT D5 INPUT D4 INPUT
AIO– –––