Datasheet

157
ATmega8515(L)
2512G–AVR–03/05
USART Baud Rate Registers –
UBRRL and UBRRH
The UBRRH Register shares the same I/O location as the UCSRC Register. See the
“Accessing UBRRH/UCSRC Registers” on page 151 section which describes how to
access this register.
Bit 15 – URSEL: Register Select
This bit selects between accessing the UBRRH or the UCSRC Register. It is read as
zero when reading UBRRH. The URSEL must be zero when writing the UBRRH.
Bit 14:12 – Reserved Bits
These bits are reserved for future use. For compatibility with future devices, these bit
must be written to zero when UBRRH is written.
Bit 11:0 – UBRR11:0: USART Baud Rate Register
This is a 12-bit register which contains the USART baud rate. The UBRRH contains the
four most significant bits, and the UBRRL contains the eight least significant bits of the
USART baud rate. Ongoing transmissions by the Transmitter and Receiver will be cor-
rupted if the baud rate is changed. Writing UBRRL will trigger an immediate update of
the baud rate prescaler.
Examples of Baud Rate
Setting
For standard crystal and resonator frequencies, the most commonly used baud rates for
asynchronous operation can be generated by using the UBRR settings in Table 68.
UBRR values which yield an actual baud rate differing less than 0.5% from the target
baud rate, are bold in the table. Higher error ratings are acceptable, but the Receiver will
have less noise resistance when the error ratings are high, especially for large serial
frames (see “Asynchronous Operational Range” on page 148). The error values are cal-
culated using the following equation:
Bit 151413121110 9 8
URSEL UBRR[11:8] UBRRH
UBRR[7:0] UBRRL
76543210
Read/Write R/W R R R R/W R/W R/W R/W
R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000
00000000
Error[%]
BaudRate
Closest Match
BaudRate
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