Datasheet

133
ATmega8515(L)
2512G–AVR–03/05
USART The Universal Synchronous and Asynchronous serial Receiver and Transmitter
(USART) is a highly flexible serial communication device. The main features are:
•
Full Duplex Operation (Independent Serial Receive and Transmit Registers)
• Asynchronous or Synchronous Operation
• Master or Slave Clocked Synchronous Operation
• High Resolution Baud Rate Generator
• Supports Serial Frames with 5, 6, 7, 8, or 9 Data Bits and 1 or 2 Stop Bits
• Odd or Even Parity Generation and Parity Check Supported by Hardware
• Data OverRun Detection
• Framing Error Detection
• Noise Filtering Includes False Start Bit Detection and Digital Low Pass Filter
• Three Separate Interrupts on TX Complete, TX Data Register Empty, and RX Complete
• Multi-processor Communication Mode
• Double Speed Asynchronous Communication Mode
Single USART The ATmega8515 has one USART. The functionality for the USART is described below.
Note that in AT90S4414/8515 compatibility mode, the double buffering of the USART
Receive Register is disabled. For details, see “AVR USART vs. AVR UART – Compati-
bility” on page 135.
A simplified block diagram of the USART Transmitter is shown in Figure 64. CPU acces-
sible I/O Registers and I/O pins are shown in bold.