Datasheet

ManualsBrandsMICROCHIP TECHNOLOGY ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller TQFP 32 (7x7) 8-Bit 16 MHz I/O number 23

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Table Of Contents

Features
Pin Configurations
Overview
- Block Diagram
- Disclaimer
- Pin Descriptions
Resources
Data Retention
About Code Examples
Atmel AVR CPU Core
- Introduction
- Architectural Overview
- Arithmetic Logic Unit – ALU
- Status Register
- General Purpose Register File
  - The X-register, Y- register and Z-register
- Stack Pointer
- Instruction Execution Timing
- Reset and Interrupt Handling
  - Interrupt Response Time
AVR ATmega8 Memories
- In-System Reprogrammable Flash Program Memory
- SRAM Data Memory
- Data Memory Access Times
- EEPROM Data Memory
- I/O Memory
System Clock and Clock Options
- Clock Systems and their Distribution
- Clock Sources
- Crystal Oscillator
- Low-frequency Crystal Oscillator
- External RC Oscillator
- Calibrated Internal RC Oscillator
  - Oscillator Calibration Register – OSCCAL
- External Clock
- Timer/Counter Oscillator
Power Management and Sleep Modes
- MCU Control Register – MCUCR
- Idle Mode
- ADC Noise Reduction Mode
- Power-down Mode
- Power-save Mode
- Standby Mode
- Minimizing Power Consumption
System Control and Reset
- Resetting the AVR
- Reset Sources
- Power-on Reset
- External Reset
- Brown-out Detection
- Watchdog Reset
- MCU Control and Status Register – MCUCSR
- Internal Voltage Reference
  - Voltage Reference Enable Signals and Start-up Time
- Watchdog Timer
  - Watchdog Timer Control Register – WDTCR
- Timed Sequences for Changing the Configuration of the Watchdog Timer
  - Safety Level 1 (WDTON Fuse Unprogrammed)
  - Safety Level 2 (WDTON Fuse Programmed)
Interrupts
- Interrupt Vectors in ATmega8
  - Moving Interrupts Between Application and Boot Space
  - General Interrupt Control Register – GICR
I/O Ports
- Introduction
- Ports as General Digital I/O
- Alternate Port Functions
- Register Description for I/O Ports
External Interrupts
- MCU Control Register – MCUCR
- General Interrupt Control Register – GICR
- General Interrupt Flag Register – GIFR
8-bit Timer/Counter0
- Overview
  - Registers
  - Definitions
- Timer/Counter Clock Sources
- Counter Unit
- Operation
- Timer/Counter Timing Diagrams
- 8-bit Timer/Counter Register Description
Timer/Counter0 and Timer/Counter1 Prescalers
- Internal Clock Source
- Prescaler Reset
- External Clock Source
- Special Function IO Register – SFIOR
16-bit Timer/Counter1
- Overview
- Accessing 16-bit Registers
  - Reusing the Temporary High Byte Register
- Timer/Counter Clock Sources
- Counter Unit
- Input Capture Unit
- Output Compare Units
- Compare Match Output Unit
  - Compare Output Mode and Waveform Generation
- Modes of Operation
- Timer/Counter Timing Diagrams
- 16-bit Timer/Counter Register Description
8-bit Timer/Counter2 with PWM and Asynchronous Operation
- Overview
  - Registers
  - Definitions
- Timer/Counter Clock Sources
- Counter Unit
- Output Compare Unit
- Compare Match Output Unit
  - Compare Output Mode and Waveform Generation
- Modes of Operation
- Timer/Counter Timing Diagrams
- 8-bit Timer/Counter Register Description
- Asynchronous Operation of the Timer/Counter
- Timer/Counter Prescaler
  - Special Function IO Register – SFIOR
Serial Peripheral Interface – SPI
- SS Pin Functionality
- Data Modes
USART
- Overview
  - AVR USART vs. AVR UART – Compatibility
- Clock Generation
- Frame Formats
  - Parity Bit Calculation
- USART Initialization
- Data Transmission – The USART Transmitter
- Data Reception – The USART Receiver
- Asynchronous Data Reception
- Multi-processor Communication Mode
  - Using MPCM
- Accessing UBRRH/UCSRC Registers
  - Write Access
  - Read Access
- USART Register Description
- Examples of Baud Rate Setting
Two-wire Serial Interface
- Features
- Two-wire Serial Interface Bus Definition
  - TWI Terminology
  - Electrical Interconnection
- Data Transfer and Frame Format
- Multi-master Bus Systems, Arbitration and Synchronization
- Overview of the TWI Module
- TWI Register Description
- Using the TWI
- Transmission Modes
- Multi-master Systems and Arbitration
Analog Comparator
- Special Function IO Register – SFIOR
- Analog Comparator Control and Status Register – ACSR
- Analog Comparator Multiplexed Input
Analog-to- Digital Converter
- Features
- Starting a Conversion
- Prescaling and Conversion Timing
- Changing Channel or Reference Selection
  - ADC Input Channels
  - ADC Voltage Reference
- ADC Noise Canceler
- ADC Conversion Result
Boot Loader Support – Read- While-Write Self- Programming
- Boot Loader Features
- Application and Boot Loader Flash Sections
  - Application Section
  - BLS – Boot Loader Section
- Read-While-Write and No Read- While-Write Flash Sections
  - RWW – Read-While- Write Section
  - NRWW – No Read- While-Write Section
- Boot Loader Lock Bits
- Entering the Boot Loader Program
  - Store Program Memory Control Register – SPMCR
- Addressing the Flash During Self- Programming
- Self-Programming the Flash
Memory Programming
- Program And Data Memory Lock Bits
- Fuse Bits
  - Latching of Fuses
- Signature Bytes
- Calibration Byte
- Page Size
- Parallel Programming Parameters, Pin Mapping, and Commands
  - Signal Names
- Parallel Programming
- Serial Downloading
- Serial Programming Pin Mapping
Electrical Characteristics – TA = -40°C to 85°C
- Absolute Maximum Ratings*
- DC Characteristics
- External Clock Drive Waveforms
- External Clock Drive
- Two-wire Serial Interface Characteristics
- SPI Timing Characteristics
- ADC Characteristics
Electrical Characteristics – TA = -40°C to 105°C
- Absolute Maximum Ratings*
- DC Characteristics TA = -40°C to 105°C, VCC = 2.7V to 5.5V (unless otherwise noted)
ATmega8 Typical Characteristics – TA = -40°C to 85°C
- Active Supply Current
- Idle Supply Current
- Power-down Supply Current
- Power-save Supply Current
- Standby Supply Current
- Pin Pull-up
- Pin Driver Strength
- Pin Thresholds and Hysteresis
- Bod Thresholds and Analog Comparator Offset
- Internal Oscillator Speed
- Current Consumption of Peripheral Units
- Current Consumption in Reset and Reset Pulsewidth
ATmega8 Typical Characteristics – TA = -40°C to 105°C
- Active Supply Current
- Idle Supply Current
- Power-down Supply Current
- Pin Pull-up
- Pin Driver Strength
- Pin Thresholds and Hysteresis
- Bod Thresholds and Analog Comparator Offset
- Internal Oscillator Speed
- Current Consumption of Peripheral Units
- Current Consumption in Reset and Reset Pulsewidth
Register Summary
Instruction Set Summary
Ordering Information
Packaging Information
- 32A
- 28P3
- 32M1-A
Errata
- ATmega8 Rev. D to I, M
Datasheet Revision History
- Changes from Rev. 2486Z- 02/11 to Rev. 2486AA- 02/2013
- Changes from Rev. 2486Y- 10/10 to Rev. 2486Z- 02/11
- Changes from Rev. 2486X- 06/10 to Rev. 2486Y- 10/10
- Changes from Rev. 2486W- 02/10 to Rev. 2486X- 06/10
- Changes from Rev. 2486V- 05/09 to Rev. 2486W- 02/10
- Changes from Rev. 2486U- 08/08 to Rev. 2486V- 05/09
- Changes from Rev. 2486T- 05/08 to Rev. 2486U- 08/08
- Changes from Rev. 2486S- 08/07 to Rev. 2486T- 05/08
- Changes from Rev. 2486R- 07/07 to Rev. 2486S- 08/07
- Changes from Rev. 2486Q- 10/06 to Rev. 2486R- 07/07
- Changes from Rev. 2486P- 02/06 to Rev. 2486Q- 10/06
- Changes from Rev. 2486O-10/04 to Rev. 2486P- 02/06
- Changes from Rev. 2486N-09/04 to Rev. 2486O-10/04
- Changes from Rev. 2486M-12/03 to Rev. 2486N-09/04
- Changes from Rev. 2486L-10/03 to Rev. 2486M-12/03
- Changes from Rev. 2486K-08/03 to Rev. 2486L-10/03
- Changes from Rev. 2486J-02/03 to Rev. 2486K-08/03
- Changes from Rev. 2486I-12/02 to Rev. 2486J-02/03
- Changes from Rev. 2486H-09/02 to Rev. 2486I-12/02
- Changes from Rev. 2486G-09/02 to Rev. 2486H-09/02
- Changes from Rev. 2486F-07/02 to Rev. 2486G-09/02
- Changes from Rev. 2486E-06/02 to Rev. 2486F-07/02
- Changes from Rev. 2486D-03/02 to Rev. 2486E-06/02
- Changes from Rev. 2486C-03/02 to Rev. 2486D-03/02
- Changes from Rev. 2486B-12/01 to Rev. 2486C-03/02
Table of Contents

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2486AA–AVR–02/2013

ATmega8(L)

Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page

0x3F (0x5F) SREG I T H S V N Z C 11

0x3E (0x5E) SPH – – – – – SP10 SP9 SP8 13

0x3D (0x5D) SPL SP7 SP6 SP5 SP4 SP3 SP2 SP1 SP0 13

0x3C (0x5C) Reserved

0x3B (0x5B) GICR INT1 INT0 – – – – IVSEL IVCE 49, 67

0x3A (0x5A) GIFR INTF1 INTF0 – – – – – – 67

0x39 (0x59) TIMSK OCIE2 TOIE2 TICIE1 OCIE1A OCIE1B TOIE1 – TOIE0 72, 100, 119

0x38 (0x58) TIFR OCF2 TOV2 ICF1 OCF1A OCF1B TOV1 –TOV072, 101, 119

0x37 (0x57) SPMCR SPMIE RWWSB – RWWSRE BLBSET PGWRT PGERS SPMEN 206

0x36 (0x56) TWCR TWINT TWEA TWSTA TWSTO TWWC TWEN –TWIE 165

0x35 (0x55) MCUCR SE SM2 SM1 SM0 ISC11 ISC10 ISC01 ISC00 33, 66

0x34 (0x54) MCUCSR – – – – WDRF BORF EXTRF PORF 41

0x33 (0x53) TCCR0 – – – – – CS02 CS01 CS00 71

0x32 (0x52) TCNT0 Timer/Counter0 (8 Bits) 72

0x31 (0x51) OSCCAL Oscillator Calibration Register 31

0x30 (0x50) SFIOR

– – – – ACME PUD PSR2 PSR10 58, 74, 120, 186

0x2F (0x4F) TCCR1A COM1A1 COM1A0 COM1B1 COM1B0 FOC1A FOC1B WGM11 WGM10 96

0x2E (0x4E) TCCR1B ICNC1 ICES1

– WGM13 WGM12 CS12 CS11 CS10 98

0x2D (0x4D) TCNT1H Timer/Counter1 – Counter Register High byte 99

0x2C (0x4C) TCNT1L Timer/Counter1 – Counter Register Low byte 99

0x2B (0x4B) OCR1AH

Timer/Counter1 – Output Compare Register A High byte

0x2A (0x4A) OCR1AL

Timer/Counter1 – Output Compare Register A Low byte

0x29 (0x49) OCR1BH

Timer/Counter1 – Output Compare Register B High byte

0x28 (0x48) OCR1BL

Timer/Counter1 – Output Compare Register B Low byte

0x27 (0x47) ICR1H Timer/Counter1 – Input Capture Register High byte 100

0x26 (0x46) ICR1L Timer/Counter1 – Input Capture Register Low byte 100

0x25 (0x45) TCCR2 FOC2 WGM20 COM21 COM20 WGM21 CS22 CS21 CS20 114

0x24 (0x44) TCNT2 Timer/Counter2 (8 Bits) 116

0x23 (0x43) OCR2

Timer/Counter2 Output Compare Register

116

0x22 (0x42) ASSR – – – – AS2 TCN2UB OCR2UB TCR2UB 117

0x21 (0x41) WDTCR – – – WDCE WDE WDP2 WDP1 WDP0 43

0x20

(1)

(0x40)

(1)

UBRRH URSEL – – – UBRR[11:8] 152

UCSRC URSEL UMSEL UPM1 UPM0 USBS UCSZ1 UCSZ0 UCPOL 150

0x1F (0x3F) EEARH – – – – – – –EEAR8 20

0x1E (0x3E) EEARL EEAR7 EEAR6 EEAR5 EEAR4 EEAR3 EEAR2 EEAR1 EEAR0 20

0x1D (0x3D) EEDR EEPROM Data Register 20

0x1C (0x3C) EECR – – – – EERIE EEMWE EEWE EERE 20

0x1B (0x3B) Reserved

0x1A (0x3A) Reserved

0x19 (0x39) Reserved

0x18 (0x38) PORTB PORTB7 PORTB6 PORTB5 PORTB4 PORTB3 PORTB2 PORTB1 PORTB0 65

0x17 (0x37) DDRB DDB7 DDB6 DDB5 DDB4 DDB3 DDB2 DDB1 DDB0 65

0x16 (0x36) PINB PINB7 PINB6 PINB5 PINB4 PINB3 PINB2 PINB1 PINB0 65

0x15 (0x35) PORTC – PORTC6 PORTC5 PORTC4 PORTC3 PORTC2 PORTC1 PORTC0 65

0x14 (0x34) DDRC

– DDC6 DDC5 DDC4 DDC3 DDC2 DDC1 DDC0 65

0x13 (0x33) PINC – PINC6 PINC5 PINC4 PINC3 PINC2 PINC1 PINC0 65

0x12 (0x32) PORTD PORTD7 PORTD6 PORTD5 PORTD4 PORTD3 PORTD2 PORTD1 PORTD0 65

0x11 (0x31) DDRD DDD7 DDD6 DDD5 DDD4 DDD3 DDD2 DDD1 DDD0 65

0x10 (0x30) PIND PIND7 PIND6 PIND5 PIND4 PIND3 PIND2 PIND1 PIND0 65

0x0F (0x2F) SPDR SPI Data Register 127

0x0E (0x2E) SPSR SPIF WCOL – – – – –SPI2X 126

0x0D (0x2D) SPCR SPIE SPE DORD MSTR CPOL CPHA SPR1 SPR0 125

0x0C (0x2C) UDR USART I/O Data Register 148

0x0B (0x2B) UCSRA RXC TXC UDRE FE DOR PE U2X MPCM 148

0x0A (0x2A) UCSRB RXCIE TXCIE UDRIE RXEN TXEN UCSZ2 RXB8 TXB8 149

0x09 (0x29) UBRRL USART Baud Rate Register Low byte 152

0x08 (0x28) ACSR ACD ACBG ACO ACI ACIE ACIC ACIS1 ACIS0 186

0x07 (0x27) ADMUX REFS1 REFS0 ADLAR – MUX3 MUX2 MUX1 MUX0 199

0x06 (0x26) ADCSRA ADEN ADSC ADFR ADIF ADIE ADPS2 ADPS1 ADPS0 200

0x05 (0x25) ADCH ADC Data Register High byte 201

0x04 (0x24) ADCL ADC Data Register Low byte 201

0x03 (0x23) TWDR Two-wire Serial Interface Data Register 167

0x02 (0x22) TWAR TWA6 TWA5 TWA4 TWA3 TWA2 TWA1 TWA0 TWGCE 167