Datasheet
38
ATmega329/3290/649/6490
2552I–AVR–04/07
Register Description
SMCR – Sleep Mode Control
Register
The Sleep Mode Control Register contains control bits for power management.
• Bits 3, 2, 1 – SM2:0: Sleep Mode Select Bits 2, 1, and 0
These bits select between the five available sleep modes as shown in Table 15.
Note: 1. Standby mode is only recommended for use with external crystals or resonators.
• Bit 1 – SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the
SLEEP instruction is executed. To avoid the MCU entering the sleep mode unless it is
the programmer’s purpose, it is recommended to write the Sleep Enable (SE) bit to one
just before the execution of the SLEEP instruction and to clear it immediately after wak-
ing up.
PRR – Power Reduction
Register
• Bits 7, 6, 5 - Res: Reserved bits
These bits are reserved bits in ATmega329/3290/649/6490 and will always read as
zero.
• Bit 4 - PRLCD: Power Reduction LCD
Writing logic one to this bit shuts down the LCD controller. The LCD controller must be
disabled and the display discharged before shut down. See "Disabling the LCD" on
page 217 for details on how to disable the LCD controller.
• Bit 3 - PRTIM1: Power Reduction Timer/Counter1
Writing logic one to this bit shuts down the Timer/Counter1 module. When
Timer/Counter1 is enabled, operation will continue like before the shutdown.
• Bit 2 - PRSPI: Power Reduction Serial Peripheral Interface
Bit 76543210
0x33 (0x53)
– – – – SM2 SM1 SM0 SE SMCR
Read/Write R R R R R/W R/W R/W R/W
Initial Value00000000
Table 15. Sleep Mode Select
SM2 SM1 SM0 Sleep Mode
000Idle
0 0 1 ADC Noise Reduction
010Power-down
011Power-save
100Reserved
101Reserved
110Standby
(1)
111Reserved
Bit 76543210
(0x64)
– – – PRLCD PRTIM1 PRSPI PRUSART0 PRADC PRR
Read/Write R R R R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0