Datasheet

236
ATmega329/3290/649/6490
2552I–AVR–04/07
The frame frequency can be calculated by the following equation:
Where:
N = prescaler divider (16, 64, 128, 256, 512, 1024, 2048, or 4096).
K = 8 for duty = 1/4, 1/2, and static.
K = 6 for duty = 1/3.
D = Division factor (see Table 103)
This is a very flexible scheme, and users are encouraged to calculate their own table to
investigate the possible frame rates from the formula above. Note when using 1/3 duty
the frame rate is increased with 33% when Frame Rate Register is constant. Example of
frame rate calculation is shown in Table 104.
Table 103. LCD Clock Divide
LCDCD2 LCDCD1 LCDCD0
Output from
Prescaler
divided by (D) :
clk
LCD
= 32.768 kHz, N = 16, and
Duty = 1/4, gives a frame rate of:
0 0 0 1 256 Hz
0 0 1 2 128 Hz
010 3 85.3 Hz
011 4 64 Hz
100 5 51.2 Hz
101 6 42.7 Hz
110 7 36.6 Hz
111 8 32 Hz
Table 104. Example of frame rate calculation
clk
LCD
duty K N LCDCD2:0 D Frame Rate
4 MHz 1/4 8 2048 011 4 4000000/(8*2048*4) = 61 Hz
4 MHz 1/3 6 2048 011 4 4000000/(6*2048*4) = 81 Hz
32.768 kHz Static 8 16 000 1 32768/(8*16*1) = 256 Hz
32.768 kHz 1/2 8 16 100 5 32768/(8*16*5) = 51 Hz
f
frame
f
clk
LCD
KND⋅⋅()
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