Datasheet

ATmega329/3290/649/6490

2552I–AVR–04/07

LCD Controller The LCD Controller/driver is intended for monochrome passive liquid crystal display

(LCD) with up to four common terminals and up to 25/40 segment terminals.

Features • Display Capacity of 25/40 Segments and Four Common Terminals

• Support Static, 1/2, 1/3 and 1/4 Duty

• Support Static, 1/2, 1/3 Bias

• On-chip LCD Power Supply, only One External Capacitor needed

• Display Possible in Power-save Mode for Low Power Consumption

• Software Selectable Low Power Waveform Capability

• Flexible Selection of Frame Frequency

• Software Selection between System Clock or an External Asynchronous Clock Source

• Equal Source and Sink Capability to maximize LCD Life Time

• LCD Interrupt Can be Used for Display Data Update or Wake-up from Sleep Mode

• Segment and Common Pins not Needed for Driving the Display Can be Used as Ordinary

I/O Pins

• Latching of Display Data gives Full Freedom in Register Update

Overview A simplified block diagram of the LCD Controller/Driver is shown in Figure . For the

actual placement of I/O pins, refer to “Pinout ATmega3290/6490” on page 2 and “Pinout

ATmega329/649” on page 3.

An LCD consists of several segments (pixels or complete symbols) which can be visible

or non visible. A segment has two electrodes with liquid crystal between them. When a

voltage above a threshold voltage is applied across the liquid crystal, the segment

becomes visible.

The voltage must alternate to avoid an electrophoresis effect in the liquid crystal, which

degrades the display. Hence the waveform across a segment must not have a DC-

component.

The PRLCD bit in “Power Reduction Register” on page 35 must be written to zero to

enable the LCD module.