Datasheet

74
ATmega325/3250/645/6450
2570K–AVR–04/07
Alternate Functions of Port G The alternate pin configuration is as follows:
Note: 1. Port G, PG5 is input only. Pull-up is always on.
See Table 109 on page 260 for RSTDISBL fuse.
The alternate pin configuration is as follows:
• RESET
– Port G, Bit 5
RESET
: External Reset input. When the RSTDISBL Fuse is programmed ('0'), PG5 will
function as input with pull-up always on.
• T0 – Port G, Bit 4
T0, Timer/Counter0 Counter Source.
• T1 – Port G, Bit 3
T1, Timer/Counter1 Counter Source.
Table 38 and Table 39 relates the alternate functions of Port G to the overriding signals
shown in Figure 27 on page 64.
Table 37. Overriding Signals for Alternate Functions in PF3:PF0
Signal
Name PF3/ADC3 PF2/ADC2 PF1/ADC1 PF0/ADC0
PUOE0000
PUOV0000
DDOE 0 0 0 0
DDOV 0 0 0 0
PVOE0000
PVOV0000
PTOE––––
DIEOE0000
DIEOV0000
DI––––
AIO ADC3 INPUT ADC2 INPUT ADC1 INPUT ADC0 INPUT
Table 38. Port G Pins Alternate Functions
Port Pin Alternate Function
PG5 RESET
(1)
PG4 T0 (Timer/Counter0 Clock Inpu)
PG3 T1 (Timer/Counter1 Clock Input)
PG2 -
PG1 -
PG0 -