Datasheet

ATmega325/3250/645/6450

2570K–AVR–04/07

• Bit 1 - PRUSART: Power Reduction USART

Writing logic one to this bit shuts down the USART by stopping the clock to the module.

When waking up the USART again, the USART should be re-initialized to ensure proper

operation.

• Bit 0 - PRADC: Power Reduction ADC

Writing logic one to this bit shuts down the ADC. The ADC must be disabled before shut

down. The analog comparator cannot use the ADC input MUX when the ADC is shut

down.

Note: The Analog Comparator is disabled using the ACD-bit in the “ACSR – Analog Compara-

tor Control and Status Register” on page 194.