Datasheet

35
ATmega325/3250/645/6450
2570K–AVR–04/07
Oscillator is stopped during sleep. If Timer/Counter2 is not using the synchronous clock,
the clock source is stopped during sleep. Note that even if the synchronous clock is run-
ning in Power-save, this clock is only available for Timer/Counter2.
Standby Mode When the SM2..0 bits are 110 and an external crystal/resonator clock option is selected,
the SLEEP instruction makes the MCU enter Standby mode. This mode is identical to
Power-down with the exception that the Oscillator is kept running. From Standby mode,
the device wakes up in six clock cycles.
Power Reduction
Register
The Power Reduction Register (PRR), see “PRR – Power Reduction Register” on page
37, provides a method to stop the clock to individual peripherals to reduce power con-
sumption. The current state of the peripheral is frozen and the I/O registers inaccessible.
Resources used by the peripheral when stopping the clock will remain occupied so the
peripheral should be disabled before stopping the clock. Waking up a module, which is
done by clearing the bit in PRR, puts the module in the same state as before shutdown.
Module shutdown can be used in IDLE mode and active mode to reduce the overall
power consumption. In all other sleep modes, the clock is already stopped.
Minimizing Power
Consumption
There are several possibilities to consider when trying to minimize the power consump-
tion in an AVR controlled system. In general, sleep modes should be used as much as
possible, and the sleep mode should be selected so that as few as possible of the
device’s functions are operating. All functions not needed should be disabled. In particu-
lar, the following modules may need special consideration when trying to achieve the
lowest possible power consumption.
Analog to Digital Converter If enabled, the ADC will be enabled in all sleep modes. To save power, the ADC should
be disabled before entering any sleep mode. When the ADC is turned off and on again,
the next conversion will be an extended conversion. Refer to “Analog to Digital Con-
verter” on page 197 for details on ADC operation.
Analog Comparator When entering Idle mode, the Analog Comparator should be disabled if not used. When
entering ADC Noise Reduction mode, the Analog Comparator should be disabled. In
other sleep modes, the Analog Comparator is automatically disabled. However, if the
Analog Comparator is set up to use the Internal Voltage Reference as input, the Analog
Comparator should be disabled in all sleep modes. Otherwise, the Internal Voltage Ref-
erence will be enabled, independent of sleep mode. Refer to “Analog Comparator” on
page 194 for details on how to configure the Analog Comparator.
Brown-out Detector If the Brown-out Detector is not needed by the application, this module should be turned
off. If the Brown-out Detector is enabled by the BODLEVEL Fuses, it will be enabled in
all sleep modes, and hence, always consume power. In the deeper sleep modes, this
will contribute significantly to the total current consumption. Refer to “Brown-out Detec-
tion” on page 41 for details on how to configure the Brown-out Detector.
Internal Voltage Reference The Internal Voltage Reference will be enabled when needed by the Brown-out Detec-
tion, the Analog Comparator or the ADC. If these modules are disabled as described in
the sections above, the internal voltage reference will be disabled and it will not be con-
suming power. When turned on again, the user must allow the reference to start up
before the output is used. If the reference is kept on in sleep mode, the output can be
used immediately. Refer to “Internal Voltage Reference” on page 44 for details on the
start-up time.