Datasheet

233
ATmega325/3250/645/6450
2570K–AVR–04/07
Boundary-scan Order
Table 97 and Table 98 shows the Scan order between TDI and TDO when the Bound-
ary-scan chain is selected as data path. Bit 0 is the LSB; the first bit scanned in, and the
first bit scanned out. The scan order follows the pin-out order as far as possible. There-
fore, the bits of Port A is scanned in the opposite bit order of the other ports. Exceptions
from the rules are the Scan chains for the analog circuits, which constitute the most sig-
nificant bits of the scan chain regardless of which physical pin they are connected to. In
Figure 102, PXn. Data corresponds to FF0, PXn. Control corresponds to FF1, and PXn.
Pull-up_enable corresponds to FF2. Bit 4, 5, 6 and 7 of Port F is not in the scan chain,
since these pins constitute the TAP pins when the JTAG is enabled.
Table 97. ATmega325/645 Boundary-scan Order, 64-pin
Bit Number Signal Name Module
197 AC_IDLE Comparator
196 ACO
195 ACME
194 AINBG
193 COMP ADC
192 ACLK
191 ACTEN
190 PRIVATE_SIGNAL1
(1)
189 ADCBGEN
188 ADCEN
187 AMPEN
186 DAC_9
185 DAC_8
184 DAC_7
183 DAC_6
182 DAC_5
181 DAC_4
180 DAC_3
179 DAC_2
178 DAC_1
177 DAC_0
176 EXTCH
175 GNDEN
174 HOLD
173 IREFEN
172 MUXEN_7
171 MUXEN_6
170 MUXEN_5