Datasheet

241
8011Q–AVR–02/2013
ATmega164P/324P/644P
Figure 20-1. Analog-to-digital Converter Block Schematic
20.3 Operation
The ADC converts an analog input voltage to a 10-bit digital value through successive approxi-
mation. The minimum value represents GND and the maximum value represents the voltage on
the AREF pin minus 1 LSB. Optionally, AVCC or an internal 2.56V reference voltage may be
connected to the AREF pin by writing to the REFSn bits in the ADMUX Register. The internal
voltage reference may thus be decoupled by an external capacitor at the AREF pin to improve
noise immunity.
The analog input channel and differential gain are selected by writing to the MUX bits in
ADMUX. Any of the ADC input pins, as well as GND and a fixed bandgap voltage reference, can
be selected as single ended inputs to the ADC. A selection of ADC input pins can be selected as
positive and negative inputs to the differential gain amplifier.
ADC CONVERSION
COMPLETE IRQ
8-BIT DATABUS
15 0
ADIE
ADATE
ADSC
ADEN
ADIF
ADIF
MUX[4:0]
ADPS[2:0]
SAMPLE & HOLD
COMPARATOR
INTERNAL
REFERENCE
(1.1V/2.56V)
AVCC
REFS[1:0]
ADLAR
CHANNEL SELECTION
ADC[9:0]
ADC
MULTIPLEXER
OUTPUT
GAIN
AMPLIFIER
AREF
BANDGAP (1.1V)
REFERENCE
GND
CONVERSION LOGIC
ADC CTRL & STATUS
REGISTER B (ADCSRB)
ADC CTRL & STATUS
REGISTER A (ADCSRA)
PRESCALER
ADC MULTIPLEXER
SELECT (ADMUX)
MUX DECODER
DIFF / GAIN SELECT
ADC DATA REGISTER
(ADCH/ADCL)
ADC[2:0]
TRIGGER
SELECT
START
INTERRUPT
FLAGS
ADTS[2:0]
+
-
NEG
INPUT
MUX
POS
INPUT
MUX
ADC[7:0]
+
-
10-bit DAC