Datasheet

i
8272A–AVR–01/10
164A/164PA/324A/324PA/644A/644PA/1284/1284P
Table of Contents
Features ..................................................................................................... 1
1 Pin Configurations ................................................................................... 2
1.1Pinout - PDIP/TQFP/VQFN/QFN/MLF for
ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P 2
1.2Pinout - DRQFN for ATmega164A/164PA/324A/324PA ...........................................3
1.3Pinout - VFBGA for ATmega164A/164PA/324A/324PA ............................................4
2 Overview ................................................................................................... 5
2.1Block Diagram ...........................................................................................................5
2.2Comparison Between ATmega164A, ATmega164PA, ATmega324A, ATmega324PA,
ATmega644A, ATmega644PA, ATmega1284 and ATmega1284P 6
2.3Pin Descriptions ........................................................................................................7
3 Resources ................................................................................................. 9
4 About Code Examples ............................................................................. 9
5 Data Retention .......................................................................................... 9
6 AVR CPU Core ........................................................................................ 10
6.1Overview .................................................................................................................10
6.2ALU – Arithmetic Logic Unit ....................................................................................11
6.3Status Register ........................................................................................................11
6.4General Purpose Register File ................................................................................13
6.5Stack Pointer ...........................................................................................................14
6.6Instruction Execution Timing ...................................................................................15
6.7Reset and Interrupt Handling ..................................................................................16
7 AVR Memories ........................................................................................ 19
7.1Overview .................................................................................................................19
7.2In-System Reprogrammable Flash Program Memory .............................................19
7.3SRAM Data Memory ...............................................................................................20
7.4EEPROM Data Memory ..........................................................................................22
7.5I/O Memory ..............................................................................................................23
7.6Register Description ................................................................................................24
8 System Clock and Clock Options ......................................................... 30
8.1Clock Systems and their Distribution .......................................................................30
8.2Clock Sources .........................................................................................................31