Datasheet

5
ATmega640/V-1280/V-1281/V-2560/V-2561/V [SUMMARY]
2549QS–AVR–02/2014
2. Overview
The ATmega640/1280/1281/2560/2561 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced
RISC architecture. By executing powerful instructions in a single clock cycle, the
ATmega640/1280/1281/2560/2561 achieves throughputs approaching 1 MIPS per MHz allowing the system
designer to optimize power consumption versus processing speed.
2.1 Block Diagram
Figure 2-1. Block Diagram
The Atmel
®
AVR
®
core combines a rich instruction set with 32 general purpose working registers. All the 32 regis-
ters are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in
one single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving
throughputs up to ten times faster than conventional CISC microcontrollers.
CPU
GND
VCC
RESET
Po w e r
Supervision
POR / BOD &
RESET
Wat chd og
Oscillator
Wat chd og
Ti m er
Oscillator
Ci rc u it s /
Cl o c k
Gen er at i o n
XTAL1
XTAL2
PC7..0 PORT C (8)
PA7..0
PORT A (8)
PORT D (8)
PD7..0
PORT B (8 )
PB7..0
PORT E ( 8 )
PE7..0
PORT F (8 )
PF7..0
PORT J (8)
PJ7..0
PG5..0 PORT G (6)
PORT H (8)
PH7..0
PORT K (8 )
PK7..0
PORT L (8)
PL7..0
XRAM
TWI SPI
EEPRO M
JTAG
8 bit T/C 0 8 bit T/ C 2
16 bit T/C 1
16 bit T/C 3
SRA MFLASH
16 bit T/C 4
16 bit T/C 5
USART 2
USART 1
USART 0
Internal
Bandgap reference
Analog
Co m p a r at o r
A/D
Co n v e r t e r
USART 3
NOTE:
Shaded par t s only available
in the 100-pin version.
Complete functionality for
t he ADC, T/ C4 , an d T/ C5 o n l y
available in the 100-pin version.