Datasheet

62
2490R–AVR–02/2013
ATmega64(L)
Notes: 1. When the BOOTRST Fuse is programmed, the device will jump to the Boot Loader address at
reset, see “Boot Loader Support – Read-While-Write Self-programming” on page 277.
2. When the IVSEL bit in MCUCR is set, Interrupt Vectors will be moved to the start of the Boot
Flash section. The address of each Interrupt Vector will then be address in this table added to
the start address of the Boot Flash section.
3. The Interrupts on address 0x0030 - 0x0044 do not exist in ATmega103 compatibility mode.
Table 24 shows Reset and Interrupt Vectors placement for the various combinations of
BOOTRST and IVSEL settings. If the program never enables an interrupt source, the Interrupt
Vectors are not used, and regular program code can be placed at these locations. This is also
the case if the Reset Vector is in the Application section while the Interrupt Vectors are in the
Boot section or vice versa.
Note: 1. The Boot Reset Address is shown in Table 112 on page 289. For the BOOTRST Fuse “1”
means unprogrammed while “0” means programmed.
The most typical and general program setup for the Reset and Interrupt Vector Addresses in
ATmega64 is:
Address Labels Code Comments
0x0000 jmp RESET ; Reset Handler
0x0002 jmp EXT_INT0 ; IRQ0 Handler
0x0004 jmp EXT_INT1 ; IRQ1 Handler
0x0006 jmp EXT_INT2 ; IRQ2 Handler
0x0008 jmp EXT_INT3 ; IRQ3 Handler
0x000A jmp EXT_INT4 ; IRQ4 Handler
0x000C jmp EXT_INT5 ; IRQ5 Handler
0x000E jmp EXT_INT6 ; IRQ6 Handler
0x0010 jmp EXT_INT7 ; IRQ7 Handler
0x0012 jmp TIM2_COMP ; Timer2 Compare Handler
0x0014 jmp TIM2_OVF ; Timer2 Overflow Handler
0x0016 jmp TIM1_CAPT ; Timer1 Capture Handler
0x0018 jmp TIM1_COMPA ; Timer1 CompareA Handler
0x001A jmp TIM1_COMPB ; Timer1 CompareB Handler
0x001C jmp TIM1_OVF ; Timer1 Overflow Handler
0x001E jmp TIM0_COMP ; Timer0 Compare Handler
0x0020 jmp TIM0_OVF ; Timer0 Overflow Handler
32 0x003E
(3)
USART1, UDRE USART1 Data Register Empty
33 0x0040
(3)
USART1, TX USART1, Tx Complete
34 0x0042
(3)
TWI Two-wire Serial Interface
35 0x0044
(3)
SPM READY Store Program Memory Ready
Table 24. Reset and Interrupt Vectors Placement
(1)
BOOTRST IVSEL Reset Address Interrupt Vectors Start Address
1 0 0x0000 0x0002
1 1 0x0000 Boot Reset Address + 0x0002
0 0 Boot Reset Address 0x0002
0 1 Boot Reset Address Boot Reset Address + 0x0002
Table 23. Reset and Interrupt Vectors (Continued)
Vector
No.
Program
Address
(2)
Source Interrupt Definition