Datasheet

34
2490R–AVR–02/2013
ATmega64(L)
XMCRB – External
Memory Control
Register B
Bit 7 – XMBK: External Memory Bus Keeper Enable
Writing XMBK to one enables the Bus Keeper on the AD7:0 lines. When the Bus Keeper is
enabled, it will ensure a defined logic level (zero or one) on AD7:0 when they would otherwise
be tri-stated. Writing XMBK to zero disables the Bus Keeper. XMBK is not qualified with SRE, so
even if the XMEM interface is disabled, the Bus Keepers are still activated as long as XMBK is
one.
Bit 6..3 – Res: Reserved Bits
These are reserved bits and will always read as zero. When writing to this address location,
write these bits to zero for compatibility with future devices.
Bit 2..0 – XMM2, XMM1, XMM0: External Memory High Mask
When the External Memory is enabled, all Port C pins are default used for the high address byte.
If the full 60 Kbytes address space is not required to access the external memory, some, or all,
Port C pins can be released for normal port pin function as described in Table 5. As described in
“Using all 64Kbytes Locations of External Memory” on page 36, it is possible to use the XMMn
bits to access all 64 Kbytes locations of the external memory.
Bit 76543210
(0x6C) XMBK XMM2 XMM1 XMM0 XMCRB
Read/Write R/W R R R R R/W R/W R/W
Initial Value00000000
Table 5. Port C Pins Released as Normal Port Pins when the External Memory is Enabled
XMM2 XMM1 XMM0 # Bits for External Memory Address Released Port Pins
0 0 0 8 (Full 60 Kbytes space) None
0017 PC7
0106 PC7 - PC6
0115 PC7 - PC5
1004 PC7 - PC4
1013 PC7 - PC3
1102 PC7 - PC2
1 1 1 No Address high bits Full Port C