Datasheet

306
2490R–AVR–02/2013
ATmega64(L)
SPI Serial
Programming Pin
Mapping
Even though the SPI Programming interface re-uses the SPI I/O module, there is one important
difference: The MOSI/MISO pins that are mapped to PB2 and PB3 in the SPI I/O module are not
used in the Programming interface. Instead, PE0 and PE1 are used for data in SPI Program-
ming mode as shown in Table 127.
Figure 147. SPI Serial Programming and Verify
(1)
Notes: 1. If the device is clocked by the internal Oscillator, it is no need to connect a clock source to the
XTAL1 pin.
2. VCC - 0.3 < AVCC < VCC + 0.3, however, AVCC should always be within 2.7V - 5.5V.
When programming the EEPROM, an auto-erase cycle is built into the self-timed programming
operation (in the Serial mode ONLY) and there is no need to first execute the Chip Erase
instruction. The Chip Erase operation turns the content of every memory location in both the
Program and EEPROM arrays into 0xFF.
Depending on CKSEL Fuses, a valid clock must be present. The minimum low and high periods
for the serial clock (SCK) input are defined as follows:
Low: > 2 CPU clock cycles for f
ck
< 12 MHz, 3 CPU clock cycles for f
ck
 12 MHz
High: > 2 CPU clock cycles for f
ck
< 12 MHz, 3 CPU clock cycles for f
ck
 12 MHz
SPI Serial
Programming
Algorithm
When writing serial data to the ATmega64, data is clocked on the rising edge of SCK.
When reading data from the ATmega64, data is clocked on the falling edge of SCK. See Figure
148 for timing details.
To program and verify the ATmega64 in the SPI Serial Programming mode, the following
sequence is recommended:
1. Power-up sequence:
Apply power between V
CC
and GND while RESET and SCK are set to “0”. In some sys-
tems, the programmer cannot guarantee that SCK is held low during Power-up. In this
case, RESET
must be given a positive pulse of at least two CPU clock cycles duration
Table 127. Pin Mapping SPI Serial Programming
Symbol Pins I/O Description
MOSI (PDI) PE0 I Serial Data In
MISO (PDO) PE1 O Serial Data Out
SCK PB1 I Serial Clock
VCC
GND
XTAL1
SCK
MISO
MOSI
RESET
PE0
PE1
PB1
+2.7 - 5.5V
AVCC
+2.7 - 5.5V
(2)