Datasheet

292
2490R–AVR–02/2013
ATmega64(L)
Notes: 1. The SPIEN Fuse is not accessible in SPI Serial Programming mode.
2. The CKOPT Fuse functionality depends on the setting of the CKSEL bits. See “Clock
Sources” on page 38
for details.
3. The default value of BOOTSZ1..0 results in maximum Boot Size. See Table 112 on page 289
4. If the JTAG interface is left unconnected, the JTAGEN fuse should if possible be disabled. This
to avoid static current at the TDO pin in the JTAG interface
Notes: 1. The default value of SUT1..0 results in maximum start-up time. See Table 14 on page 43 for
details.
2. The default setting of CKSEL3..0 results in internal RC Oscillator @ 1 MHz. See Table 6 on
page 38 for details.
The status of the Fuse bits is not affected by Chip Erase. Note that the Fuse bits are locked if
Lock bit1 (LB1) is programmed. Program the Fuse bits before programming the Lock bits.
Table 118. Fuse High Byte
Fuse High Byte Bit no Description Default Value
OCDEN 7 Enable OCD 1 (unprogrammed, OCD
disabled)
JTAGEN
(4)
6 Enable JTAG 0 (programmed, JTAG
enabled)
SPIEN
(1)
5 Enable SPI Serial Program and
Data Downloading
0 (programmed, SPI prog.
enabled)
CKOPT
(2)
4 Oscillator options 1 (unprogrammed)
EESAVE 3 EEPROM memory is preserved
through the Chip Erase
1 (unprogrammed,
EEPROM not preserved)
BOOTSZ1 2 Select Boot Size (see Table 112
for details)
0 (programmed)
(3)
BOOTSZ0 1 Select Boot Size (see Table 112
for details)
0 (programmed)
(3)
BOOTRST 0 Select Reset Vector 1 (unprogrammed)
Table 119. Fuse Low Byte
Fuse Low Byte Bit no Description Default Value
BODLEVEL 7 Brown out detector trigger
level
1 (unprogrammed)
BODEN 6 Brown out detector enable 1 (unprogrammed, BOD
disabled)
SUT1 5 Select start-up time 1 (unprogrammed)
(1)
SUT0 4 Select start-up time 0 (programmed)
(1)
CKSEL3 3 Select Clock source 0 (programmed)
(2)
CKSEL2 2 Select Clock source 0 (programmed)
(2)
CKSEL1 1 Select Clock source 0 (programmed)
(2)
CKSEL0 0 Select Clock source 1 (unprogrammed)
(2)