Datasheet

262
2490R–AVR–02/2013
ATmega64(L)
Scanning the Clock
Pins
The AVR devices have many clock options selectable by fuses. These are: Internal RC Oscilla-
tor, External RC, External Clock, (High Frequency) Crystal Oscillator, Low-frequency Crystal
Oscillator, and Ceramic Resonator.
Figure 131 shows how each Oscillator with external connection is supported in the scan chain.
The Enable signal is supported with a general boundary-scan cell, while the Oscillator/clock out-
put is attached to an observe-only cell. In addition to the main clock, the timer Oscillator is
scanned in the same way. The output from the internal RC Oscillator is not scanned, as this
Oscillator does not have external connections.
Figure 131. Boundary-scan Cells for Oscillators and Clock Options
Table 102 summaries the scan registers for the external clock pin XTAL1, oscillators with
XTAL1/XTAL2 connections as well as 32 kHz Timer Oscillator.
Notes: 1. Do not enable more than one clock source as main clock at a time.
2. Scanning an Oscillator output gives unpredictable results as there is a frequency drift between
the internal Oscillator and the JTAG TCK clock. If possible, scanning an external clock is
preferred.
3. The clock configuration is programmed by fuses. As a fuse does not change run-time, the
clock configuration is considered fixed for a given application. The user is advised to scan the
same clock option as to be used in the final system. The enable signals are supported in the
scan chain because the system logic can disable clock options in sleep modes, thereby dis-
Table 102. Scan Signals for the Oscillators
(1)(2)(3)
Enable
Signal
Scanned Clock
Line Clock Option
Scanned Clock Line
when Not Used
EXTCLKEN EXTCLK (XTAL1) External Clock 0
OSCON OSCCK External Crystal
External Ceramic Resonator
0
RCOSCEN RCCK External RC 0
OSC32EN OSC32CK Low Freq. External Crystal 1
TOSKON TOSCK 32 kHz Timer Oscillator 0
0
1
DQ
From
Previous
Cell
ClockDR
ShiftDR
To
Next
Cell
To System Logic
FF1
0
1
DQ DQ
G
0
1
From
Previous
Cell
ClockDR UpdateDR
ShiftDR
To
Next
Cell EXTEST
From Digital Logic
XTAL1/TOSC1 XTAL2/TOSC2
Oscillator
ENABLE OUTPUT