Datasheet

247

2490R–AVR–02/2013

ATmega64(L)

• ADC9:0: ADC Conversion Result

These bits represent the result from the conversion, as detailed in “ADC Conversion Result” on

page 242.

ADCSRB – ADC

Control and Status

• Bits 7:3 – Res: Reserved Bits

These bits are reserved bits in the ATmega64 and will always read as zero.

• Bit 2:0 – ADTS2:0: ADC Auto Trigger Source

If ADATE in ADCSRA is written to one, the value of these bits selects which source will trigger

an ADC conversion. If ADATE is cleared, the ADTS2:0 settings will have no effect. A conversion

will be triggered by the rising edge of the selected interrupt flag. Note that switching from a trig-

ger source that is cleared to a trigger source that is set, will generate a positive edge on the

trigger signal. If ADEN in ADCSRA is set, this will start a conversion. Switching to Free Running

mode (ADTS[2:0]=0) will not cause a trigger event, even if the ADC Interrupt Flag is set

Bit 76543210

(0x8E) – – – – – ADTS2 ADTS1 ADTS0 ADCSRB

Read/Write R R R R R R/W R/W R/W

Initial Value00000000

Figure 122. ADC Auto Trigger Source Selections

ADTS2 ADTS1 ADTS0 Trigger Source

0 0 0 Free Running mode

0 0 1 Analog Comparator

0 1 0 External Interrupt Request 0

0 1 1 Timer/Counter0 Compare Match

1 0 0 Timer/Counter0 Overflow

1 0 1 Timer/Counter1 Compare Match B

1 1 0 Timer/Counter1 Overflow

1 1 1 Timer/Counter1 Capture Event