Datasheet

2490R–AVR–02/2013

ATmega64(L)

EEARH and EEARL –

EEPROM Address

• Bits 15..11 – Res: Reserved Bits

These are reserved bits and will always read as zero. When writing to this address location,

write these bits to zero for compatibility with future devices.

• Bits 10..0 – EEAR10..0: EEPROM Address

The EEPROM Address Registers – EEARH and EEARL specify the EEPROM address in the 2

Kbytes EEPROM space. The EEPROM data bytes are addressed linearly between 0 and 2,048.

The Initial Value of EEAR is undefined. A proper value must be written before the EEPROM may

be accessed.

EEDR – EEPROM Data

• Bits 7..0 – EEDR7.0: EEPROM Data

For the EEPROM write operation, the EEDR Register contains the data to be written to the

EEPROM in the address given by the EEAR Register. For the EEPROM read operation, the

EEDR contains the data read out from the EEPROM at the address given by EEAR.

EECR – EEPROM

Control Register

• Bits 7..4 – Res: Reserved Bits

These bits are reserved bits in the ATmega64 and will always read as zero.

• Bit 3 – EERIE: EEPROM Ready Interrupt Enable

Writing EERIE to one enables the EEPROM Ready Interrupt if the I-bit in SREG is set. Writing

EERIE to zero disables the interrupt. The EEPROM Ready Interrupt generates a constant inter-

rupt when EEWE is cleared.

Bit 1514131211 10 9 8

0x1F (0x3F) – – – – – EEAR10 EEAR9 EEAR8 EEARH

0x1E (0x3E) EEAR7 EEAR6 EEAR5 EEAR4 EEAR3 EEAR2 EEAR1 EEAR0 EEARL

76543 2 10

Read/Write R R R R R R/W R/W R/W

R/W R/W R/W R/W R/W R/W R/W R/W

Initial Value 0 0 0 0 0 X X X

XXXXX X XX

Bit 76543210

0x1D (0x3D) MSB LSB EEDR

Read/Write R/W R/W R/W R/W R/W R/W R/W R/W

Initial Value00000000

Bit 765432 10

0x1C (0x3C) – – – – EERIE EEMWE EEWE EERE EECR

Read/Write R R R R R/W R/W R/W R/W

Initial Value 0 0 0 0 0 0 X 0