Datasheet

18
2490R–AVR–02/2013
ATmega64(L)
AVR Memories This section describes the different memories in the ATmega64. The AVR architecture has two
main memory spaces, the Data Memory and the Program Memory space. In addition, the
ATmega64 features an EEPROM Memory for data storage. All three memory spaces are linear
and regular.
In-System
Reprogrammable
Flash Program
Memory
The ATmega64 contains 64 Kbytes On-chip In-System Reprogrammable Flash memory for pro-
gram storage. Since all AVR instructions are 16 bits or 32 bits wide, the Flash is organized as
32K x 16. For software security, the Flash Program memory space is divided into two sections,
Boot Program section and Application Program section.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The ATmega64 Pro-
gram Counter (PC) is 15 bits wide, thus addressing the 32K program memory locations. The
operation of Boot Program section and associated Boot Lock bits for software protection are
described in detail in “Boot Loader Support – Read-While-Write Self-programming” on page 277.
“Memory Programming” on page 290 contains a detailed description on Flash programming in
SPI, JTAG, or Parallel Programming mode.
Constant tables can be allocated within the entire program memory address space (see the LPM
– Load Program Memory instruction description).
Timing diagrams for instruction fetch and execution are presented in “Instruction Execution Tim-
ing” on page 14.
Figure 8. Program Memory Map
$0000
$7FFF
Application Flash Section
Boot Flash Section