Datasheet

148
2490R–AVR–02/2013
ATmega64(L)
Counter Unit The main part of the 8-bit Timer/Counter is the programmable bi-directional counter unit. Figure
62 shows a block diagram of the counter and its surroundings.
Figure 62. Counter Unit Block Diagram
Signal description (internal signals):
count Increment or decrement TCNT2 by 1.
direction Select between increment and decrement.
clear Clear TCNT2 (set all bits to zero).
clk
Tn
Timer/counter clock, referred to as clk
T0
in the following.
top Signalize that TCNT2 has reached maximum value.
bottom Signalize that TCNT2 has reached minimum value (zero).
Depending of the mode of operation used, the counter is cleared, incremented, or decremented
at each timer clock (clk
T2
). clk
T2
can be generated from an external or internal clock source,
selected by the Clock Select bits (CS22:0). When no clock source is selected (CS22:0 = 0) the
timer is stopped. However, the TCNT2 value can be accessed by the CPU, regardless of
whether clk
T2
is present or not. A CPU write overrides (has priority over) all counter clear or
count operations.
The counting sequence is determined by the setting of the WGM01 and WGM00 bits located in
the Timer/Counter Control Register (TCCR2). There are close connections between how the
counter behaves (counts) and how waveforms are generated on the Output Compare output
OC2. For more details about advanced counting sequences and waveform generation, see
“Modes of Operation” on page 151.
The Timer/Counter Overflow Flag (TOV2) is set according to the mode of operation selected by
the WGM21:0 bits. TOV2 can be used for generating a CPU interrupt.
Output Compare
Unit
The 8-bit comparator continuously compares TCNT2 with the Output Compare Register
(OCR2). Whenever TCNT2 equals OCR2, the comparator signals a match. A match will set the
Output Compare Flag (OCF2) at the next timer clock cycle. If enabled (OCIE2 = 1 and Global
Interrupt Flag in SREG is set), the Output Compare Flag generates an Output Compare inter-
rupt. The OCF2 flag is automatically cleared when the interrupt is executed. Alternatively, the
OCF2 flag can be cleared by software by writing a logical one to its I/O bit location. The Wave-
form Generator uses the match signal to generate an output according to operating mode set by
the WGM21:0 bits and Compare Output mode (COM21:0) bits. The max and bottom signals are
used by the Waveform Generator for handling the special cases of the extreme values in some
modes of operation (see “Modes of Operation” on page 151). Figure 63 shows a block diagram
of the Output Compare unit.
DATA B US
TCNTn Control Logic
count
TOVn
(Int.Req.)
Clock Select
top
Tn
Edge
Detector
( From Prescaler )
clk
Tn
bottom
direction
clear