Datasheet

hardware clears the corresponding interrupt flag. Interrupt flags can be cleared by writing a logic one to

the flag bit position(s) to be cleared. If an interrupt condition occurs while the corresponding interrupt

enable bit is cleared, the interrupt flag will be set and remembered until the interrupt is enabled, or the

flag is cleared by software. Similarly, if one or more interrupt conditions occur while the global interrupt

enable bit is cleared, the corresponding interrupt flag(s) will be set and remembered until the global

interrupt enable bit is set and will then be executed by order of priority.

The second type of interrupts will trigger as long as the interrupt condition is present. These interrupts do

not necessarily have interrupt flags. If the interrupt condition disappears before the interrupt is enabled,

the interrupt will not be triggered. When the AVR exits from an interrupt, it will always return to the main

program and execute one more instruction before any pending interrupt is served.

The Status register is not automatically stored when entering an interrupt routine, nor restored when

returning from an interrupt routine. This must be handled by software.

When using the CLI instruction to disable interrupts, the interrupts will be immediately disabled. No

interrupt will be executed after the CLI instruction, even if it occurs simultaneously with the CLI

instruction. The following example shows how this can be used to avoid interrupts during the timed

EEPROM write sequence.

Assembly Code Example

(1)

in r16, SREG ; store SREG value

cli ; disable interrupts during timed sequence

sbi EECR, EEMPE ; start EEPROM write

sbi EECR, EEPE

out SREG, r16 ; restore SREG value (I-bit)

C Code Example

(1)

char cSREG;

cSREG = SREG; /* store SREG value */

/* disable interrupts during timed sequence */

_CLI();

EECR |= (1<<EEMPE); /* start EEPROM write */

EECR |= (1<<EEPE);

SREG = cSREG; /* restore SREG value (I-bit) */

1. Refer to About Code Examples.

When using the SEI instruction to enable interrupts, the instruction following SEI will be executed before

any pending interrupts, as shown in this example.

Assembly Code Example

(1)

sei ; set Global Interrupt Enable

sleep ; enter sleep, waiting for interrupt

; note: will enter sleep before any pending interrupt(s)

C Code Example

(1)

__enable_interrupt(); /* set Global Interrupt Enable */

__sleep(); /* enter sleep, waiting for interrupt */

/* note: will enter sleep before any pending interrupt(s) */

1. Refer to About Code Examples.