Datasheet

Figure 26-14. Formats and States in the Master Receiver Mode
S SLA R A A
0x08 0x40 0x50
SLA R
0x10
A P
0x48
A or A
0x38 0x38
W
A
0x68 0x78 0xB0
MR
MT
Next transfer
started with a
repeated start
condition
Successfull
reception
from a slave
receiver
Not acknowledge
received after the
slave address
Arbitration lost in slave
address or data byte
Arbitration lost and
addressed as slave
From master to slave
From slave to master
Any number of data bytes
and their associated acknowledge bits
This number (contained in TWSR) corresponds
to a defined state of the Two-Wire Serial Bus. The
prescaler bits are zero or masked to zero.
To corresponding
states in slave mode
Other master
continues
DATA A
n
PA
0x58
A
R
S
Other master
continues
Other master
continues
DATA
DATA
26.7.3 Slave Transmitter Mode
In the Slave Transmitter (ST) mode, a number of data bytes are transmitted to a master receiver, as in the
figure below. All the status codes mentioned in this section assume that the prescaler bits are zero or are
masked to zero.
ATmega48PA/88PA/168PA
Two-Wire Serial Interface (TWI)
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40002011A-page 290