Datasheet
setting (or clearing) the OC2x register at compare match between OCR2x and TCNT2 when the counter
decrements. The PWM frequency for the output when using phase correct PWM can be calculated by the
following equation:
OCnxPCPWM
=
clk_I/O
510
The N variable represents the prescale factor (1, 8, 32, 64, 128, 256, or 1024).
The extreme values for the OCR2A represent special cases when generating a PWM waveform output in
the phase correct PWM mode. If the OCR2A is set equal to BOTTOM, the output will be continuously low
and if set equal to MAX the output will be continuously high for non-inverted PWM mode. For inverted
PWM the output will have the opposite logic values.
At the very start of period 2 in the above figure OC2x has a transition from high to low even though there
is no compare match. The point of this transition is to guarantee symmetry around BOTTOM. There are
two cases that give a transition without compare match.
• OCR2A changes its value from MAX, as shown in the preceding figure. When the OCR2A value is
MAX the OC2 pin value is the same as the result of a down-counting compare match. To ensure
symmetry around BOTTOM the OC2 value at MAX must correspond to the result of an up-counting
Compare Match.
• The timer starts counting from a value higher than the one in OCR2A, and for that reason misses
the compare match and hence the OC2 change that would have happened on the way up.
22.8 Timer/Counter Timing Diagrams
The following figures show the timer/counter in Synchronous mode, and the timer clock (clk
T2
) is
therefore shown as a clock enable signal. In Asynchronous mode, clk
I/O
should be replaced by the timer/
counter oscillator clock. The figures include information on when interrupt flags are set. The following
figure contains timing data for basic timer/counter operation. The figure shows the count sequence close
to the MAX value in all modes other than phase correct PWM mode.
Figure 22-8. Timer/Counter Timing Diagram, no Prescaling
clk
Tn
(clk
I/O
/1)
TOVn
clk
I/O
TCNTn MAX - 1 MAX BOTTOM BOTTOM + 1
The following figure shows the same timing data, but with the prescaler enabled.
ATmega48PA/88PA/168PA
8-bit Timer/Counter2 (TC2) with PWM and A...
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40002011A-page 209