Datasheet

Figure 22-2. Counter Unit Block Diagram
DATA BUS
TCNTn Control Logic
TOVn
(Int.Req.)
topbottom
direction
TOSC1
T/C
Oscillator
TOSC2
Prescaler
clk
I/O
clk
Tn
clear
count
Table 22-2. Signal description (internal signals):
Signal name Description
count Increment or decrement TCNT2 by 1.
direction Selects between increment and decrement.
clear Clear TCNT2 (set all bits to zero).
clk
Tn
Timer/counter clock, referred to as clk
T2
in the following.
top Signalizes that TCNT2 has reached maximum value.
bottom Signalizes that TCNT2 has reached minimum value (zero).
Depending on the mode of operation used, the counter is cleared, incremented, or decremented at each
timer clock (clk
T2
). clk
T2
can be generated from an external or internal clock source, selected by the Clock
Select bits (CS2[2:0]). When no clock source is selected (CS2[2:0]=0x0) the timer is stopped. However,
the TCNT2 value can be accessed by the CPU, regardless of whether clk
T2
is present or not. A CPU write
overrides (has priority over) all counter clear or count operations.
The counting sequence is determined by the setting of the WGM21 and WGM20 bits located in the Timer/
Counter Control Register (TCCR2A) and the WGM22 bit located in the Timer/Counter Control Register B
(TCCR2B). There are close connections between how the counter behaves (counts) and how waveforms
are generated on the Output Compare outputs OC2A and OC2B. For more details about advanced
counting sequences and waveform generation, see Modes of Operation.
The Timer/Counter Overflow Flag (TOV2) is set according to the mode of operation selected by the
TCC2B.WGM2[2:0] bits. TOV2 can be used for generating a CPU interrupt.
22.5 Output Compare Unit
The 8-bit comparator continuously compares TCNT2 with the Output Compare Register (OCR2A and
OCR2B). Whenever TCNT2 equals OCR2A or OCR2B, the comparator signals a match. A match will set
the Output Compare Flag (OCF2A or OCF2B) at the next timer clock cycle. If the corresponding interrupt
is enabled, the output compare flag generates an output compare interrupt. The output compare flag is
automatically cleared when the interrupt is executed. Alternatively, the output compare flag can be
cleared by software by writing a logical one to its I/O bit location. The waveform generator uses the match
signal to generate an output according to operating mode set by the WGM2[2:0] bits and Compare
Output mode (COM2x[1:0]) bits. The max and bottom signals are used by the waveform generator for
handling the special cases of the extreme values in some modes of operation (See Modes of Operation).
ATmega48PA/88PA/168PA
8-bit Timer/Counter2 (TC2) with PWM and A...
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Datasheet Complete
DS40002011A-page 202