Datasheet

ManualsBrandsMICROCHIP TECHNOLOGY ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller VFQFN 28 (4x4) 8-Bit 20 MHz I/O number 23

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COM1A[1]/

COM1B[1]

COM1A[0]/

COM1B[0]

Description

1 0 Clear OC1A/OC1B on compare match, set OC1A/OC1B at

BOTTOM (Non-inverting mode)

1 1 Set OC1A/OC1B on compare match, clear OC1A/OC1B at

BOTTOM (Inverting mode)

Note:

1. A special case occurs when OCR1A/OCR1B equals TOP and COM1A[1]/COM1B[1] is set. In this

case the compare match is ignored, but the set or clear is done at BOTTOM. Refer to 20.12.3 Fast

PWM Mode for details.

The table below shows the COM1x[1:0] bit functionality when the WGM1[3:0] bits are set to the phase

correct or the phase and frequency correct, PWM mode.

Table 20-5. Compare Output Mode, Phase Correct, and Phase and Frequency Correct PWM

COM1A[1]/

COM1B[1]

COM1A[0]/

COM1B[0]

Description

0 0 Normal port operation, OC1A/OC1B disconnected.

0 1 WGM1[3:0] = 9 or 11: Toggle OC1A on compare match, OC1B

disconnected (normal port operation). For all other WGM1

settings, normal port operation, OC1A/OC1B disconnected.

1 0 Clear OC1A/OC1B on compare match when up-counting. Set

OC1A/OC1B on compare match when down-counting.

1 1 Set OC1A/OC1B on compare match when up-counting. Clear

OC1A/OC1B on compare match when down-counting.

Note:

1. A special case occurs when OCR1A/OCR1B equals TOP and COM1A[1]/COM1B[1] is set. Refer to

20.12.4 Phase Correct PWM Mode for details.

Bits 1:0 – WGM1[1:0] Waveform Generation Mode

Combined with the WGM1[3:2] bits found in the TCCR1B register, these bits control the counting

sequence of the counter, the source for maximum (TOP) counter value, and what type of waveform

generation to be used. Modes of operation supported by the timer/counter unit are; Normal mode

(counter), Clear Timer on Compare Match (CTC) mode, and three types of Pulse-Width Modulation

(PWM) modes. (See 20.12 Modes of Operation).

Table 20-6. Waveform Generation Mode Bit Description

Mode

WGM1[3] WGM1[2]

(CTC1)

(1)

WGM1[1]

(PWM1[1])

(1)

WGM1[0]

(PWM1[0])

(1)

Timer/

Counter

Mode of

Operation

TOP Update of

OCR1x at

TOV1 Flag

Set on

0 0 0 0 0 Normal 0xFFFF Immediate MAX

1 0 0 0 1 PWM, Phase

Correct, 8-bit

0x00FF TOP BOTTOM

ATmega48PA/88PA/168PA

16-bit Timer/Counter1 (TC1) with PWM

Datasheet Complete

DS40002011A-page 184