Datasheet
COM0B[1] COM0B[0] Description
1 0 Clear OC0B on compare match, set OC0B at BOTTOM, (Non-inverting mode).
1 1 Set OC0B on compare match, clear OC0B at BOTTOM, (Inverting mode).
Note:
1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the compare
match is ignored, but the set or clear is done at TOP. Refer to 19.7.3 Fast PWM Mode for details.
The table below shows the COM0B[1:0] bit functionality when the WGM0[2:0] bits are set to phase
correct PWM mode.
Table 19-8. Compare Output Mode, Phase Correct PWM Mode
(1)
COM0B[1] COM0B[0] Description
0 0 Normal port operation, OC0B disconnected.
0 1 Reserved.
1 0 Clear OC0B on compare match when up-counting. Set OC0B on compare
match when down-counting.
1 1 Set OC0B on compare match when up-counting. Clear OC0B on compare
match when down-counting.
Note:
1. A special case occurs when OCR0B equals TOP and COM0B[1] is set. In this case, the compare
match is ignored, but the set or clear is done at TOP. Refer to 19.7.4 Phase Correct PWM Mode for
details.
Bits 1:0 – WGM0[1:0] Waveform Generation Mode
Combined with the WGM02 bit found in the TCCR0B register, these bits control the counting sequence of
the counter, the source for maximum (TOP) counter value, and what type of waveform generation to be
used. Modes of operation supported by the Timer/Counter unit are: Normal mode (counter), Clear Timer
on Compare Match (CTC) mode, and two types of Pulse Width Modulation (PWM) modes (see 19.7
Modes of Operation).
Table 19-9. Waveform Generation Mode Bit Description
Mode
WGM0[2] WGM0[1] WGM0[0] Timer/Counter Mode of Operation TOP Update of OCR0x at TOV Flag Set on
(1)(2)
0 0 0 0 Normal 0xFF Immediate MAX
1 0 0 1 PWM, Phase Correct 0xFF TOP BOTTOM
2 0 1 0 CTC OCR0A Immediate MAX
3 0 1 1 Fast PWM 0xFF BOTTOM MAX
4 1 0 0 Reserved - - -
5 1 0 1 PWM, Phase Correct OCR0A TOP BOTTOM
6 1 1 0 Reserved - - -
7 1 1 1 Fast PWM OCR0A BOTTOM TOP
Note:
1. MAX = 0xFF
2. BOTTOM = 0x00
ATmega48PA/88PA/168PA
8-bit Timer/Counter0 (TC0) with PWM
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40002011A-page 152