Datasheet

45
2545F–AVR–06/05
ATmega48/88/168
Figure 9-2. MCU Start-up, RESET Tied to V
CC
Figure 9-3. MCU Start-up, RESET Extended Externally
9.0.4 External Reset
An External Reset is generated by a low level on the RESET
pin. Reset pulses longer than the
minimum pulse width (see Table 9-1) will generate a reset, even if the clock is not running.
Shorter pulses are not guaranteed to generate a reset. When the applied signal reaches the
Reset Threshold Voltage – V
RST
– on its positive edge, the delay counter starts the MCU after
the Time-out period – t
TOUT
– has expired. The External Reset can be disabled by the RSTDISBL
fuse, see Table 26-6 on page 282.
Figure 9-4. External Reset During Operation
V
RESET
TIME-OUT
INTERNAL
RESET
t
TOUT
V
POT
V
RST
CC
RESET
TIME-OUT
INTERNAL
RESET
t
TOUT
V
POT
V
RST
V
CC
CC