Datasheet

353
2545F–AVR–06/05
ATmega48/88/168
34.4 Rev. 2545C-04/04
34.5 Rev. 2545B-01/04
9. Updated Ordering Information for ”ATmega168” on page 344.
10. Updated ”Errata ATmega88” on page 349 and ”Errata ATmega168” on page 350.
11. Updated equation in ”Bit Rate Generator Unit” on page 211.
1. Speed Grades changed: 12MHz to 10MHz and 24MHz to 20MHz
2. Updated ”Maximum Speed vs. VCC” on page 302.
3. Updated ”Ordering Information” on page 342.
4. Updated ”Errata ATmega88” on page 349.
1. Added PDIP to “I/O and Packages”, updated “Speed Grade” and Power Consumption
Estimates in 34.”Features” on page 1.
2. Updated ”Stack Pointer” on page 11 with RAMEND as recommended Stack Pointer
value.
3. Added section ”Power Reduction Register” on page 39 and a note regarding the use
of the PRR bits to 2-wire, Timer/Counters, USART, Analog Comparator and ADC
sections.
4. Updated ”Watchdog Timer” on page 49.
5. Updated Figure 14-2 on page 128 and Table 14-3 on page 129.
6. Extra Compare Match Interrupt OCF2B added to features in section ”8-bit
Timer/Counter2 with PWM and Asynchronous Operation” on page 138
7. Updated Table 8-2 on page 39, Table 22-5 on page 254, Table 26-4 to Table 26-7 on
page 281 to 283 and Table 22-1 on page 244. Added note 2 to Table 26-1 on page
280. Fixed typo in Table 11-1 on page 65.
8. Updated whole ”ATmega48/88/168 Typical Characteristics – Preliminary Data” on
page 308.
9. Added item 2 to 5 in ”Errata ATmega48” on page 348.
10. Renamed the following bits:
- SPMEN to SELFPRGEN
- PSR2 to PSRASY
- PSR10 to PSRSYNC
- Watchdog Reset to Watchdog System Reset
11. Updated C code examples containing old IAR syntax.
12. Updated BLBSET description in ”Store Program Memory Control and Status Register
– SPMCSR” on page 269.