Datasheet

352
2545F–AVR–06/05
ATmega48/88/168
34. Datasheet Revision History
Please note that the referring page numbers in this section are referred to this document. The
referring revision in this section are referring to the document revision.
34.1 Rev. 2545F-05/05
34.2 Rev. 2545E-02/05
34.3 Rev. 2545D-07/04
1. Added Section 3. ”Resources” on page 6
2. Update Section 7.6 ”Calibrated Internal RC Oscillator” on page 31.
3. Updated Section 26.8.3 ”Serial Programming Instruction set” on page 297.
4. Table notes in Section 27.2 ”DC Characteristics ATmega48/88/168*” on page 300
updated.
5. Updated Section 33. ”Errata” on page 348.
1. MLF-package alternative changed to “Quad Flat No-Lead/Micro Lead Frame Package
QFN/MLF”.
2. Updated ”The EEPROM Control Register – EECR” on page 19.
3. Updated ”Calibrated Internal RC Oscillator” on page 31.
4. Updated ”External Clock” on page 33.
5. Updated Table 9-1 on page 44, Table 27-3 on page 305, Table 27-1 on page 302and
Table 26-16 on page 297
6. Added ”Pin Change Interrupt Timing” on page 64
7. Updated ”8-bit Timer/Counter Block Diagram” on page 88.
8. Updated ”Store Program Memory Control and Status Register – SPMCSR” on page
259.
9. Updated ”Enter Programming Mode” on page 286.
10. Updated ”DC Characteristics ATmega48/88/168*” on page 300.
11. Updated ”Ordering Information” on page 342.
12. Updated ”Errata ATmega88” on page 349 and ”Errata ATmega168” on page 350.
1. Updated instructions used with WDTCSR in relevant code examples.
2. Updated Table 7-5 on page 29, Table 9-2 on page 46, Table 25-9 on page 278, and
Table 25-11 on page 279.
3. Updated ”System Clock Prescaler” on page 34.
4. Moved “Timer/Counter2 Interrupt Mask Register – TIMSK2” and
“Timer/Counter2 Interrupt Flag Register – TIFR2” to
”8-bit Timer/Counter Register Description” on page 149.
5. Updated cross-reference in ”Electrical Interconnection” on page 206.
6. Updated equation in ”Bit Rate Generator Unit” on page 211.
7. Added ”Page Size” on page 284.
8. Updated ”Serial Programming Algorithm” on page 296.