Datasheet

236
2545F–AVR–06/05
ATmega48/88/168
Figure 21-1. Analog Comparator Block Diagram
(2)
Notes: 1. See Table 21-2 on page 238.
2. Refer to Figure 1-1 on page 2 and Table 12-9 on page 83 for Analog Comparator pin
placement.
21.0.1 ADC Control and Status Register B – ADCSRB
• Bit 6 – ACME: Analog Comparator Multiplexer Enable
When this bit is written logic one and the ADC is switched off (ADEN in ADCSRA is zero), the
ADC multiplexer selects the negative input to the Analog Comparator. When this bit is written
logic zero, AIN1 is applied to the negative input of the Analog Comparator. For a detailed
description of this bit, see ”Analog Comparator Multiplexed Input” on page 237.
21.0.2 Analog Comparator Control and Status Register – ACSR
• Bit 7 – ACD: Analog Comparator Disable
When this bit is written logic one, the power to the Analog Comparator is switched off. This bit
can be set at any time to turn off the Analog Comparator. This will reduce power consumption in
Active and Idle mode. When changing the ACD bit, the Analog Comparator Interrupt must be
disabled by clearing the ACIE bit in ACSR. Otherwise an interrupt can occur when the bit is
changed.
• Bit 6 – ACBG: Analog Comparator Bandgap Select
When this bit is set, a fixed bandgap reference voltage replaces the positive input to the Analog
Comparator. When this bit is cleared, AIN0 is applied to the positive input of the Analog Compar-
ator. See Section “9.1” on page 48.
ACBG
BANDGAP
REFERENCE
ADC MULTIPLEXER
OUTPUT
ACME
ADEN
(1)
Bit 7 6543210
–ACME– – – ADTS2 ADTS1 ADTS0 ADCSRB
Read/Write R R/W R R R R/W R/W R/W
Initial Value0 0000000
Bit 76543210
ACD ACBG ACO ACI ACIE ACIC ACIS1 ACIS0 ACSR
Read/Write R/W R/W R R/W R/W R/W R/W R/W
Initial Value 0 0 N/A 0 0 0 0 0