Datasheet

ATmega48/88/168 Automotive [DATASHEET]
7530K–AVR–07/14
86
Figure 12-9 shows the same timing data, but with the prescaler enabled.
Figure 12-9. Timer/Counter Timing Diagram, with Prescaler (f
clk_I/O
/8)
Figure 12-10 shows the setting of OCF0B in all modes and OCF0A in all modes except CTC mode and PWM mode, where
OCR0A is TOP.
Figure 12-10.Timer/Counter Timing Diagram, Setting of OCF0x, with Prescaler (f
clk_I/O
/8)
Figure 12-11 shows the setting of OCF0A and the clearing of TCNT0 in CTC mode and fast PWM mode where OCR0A is
TOP.
Figure 12-11.Timer/Counter Timing Diagram, Clear Timer on Compare Match mode, with Prescaler (f
clk_I/O
/8)
MAX - 1
clk
I/O
(clk
I/O
/8)
TCNTn
TOVn
clk
Tn
MAX BOTTOM BOTTOM + 1
OCRnx - 1
clk
I/O
(clk
I/O
/8)
TCNTn
OCRnx
OCFnx
clk
Tn
OCRnx OCRnx + 1
OCRnx Value
OCRnx + 2
TOP - 1
clk
I/O
(clk
I/O
/8)
TCNTn
(CTC)
OCRnx
OCFnx
clk
Tn
TOP BOTTOM
TOP
BOTTOM + 1