Datasheet
ATmega48/88/168 Automotive [DATASHEET]
7530K–AVR–07/14
70
• XCK/T0/PCINT20 – Port D, Bit 4
XCK, USART external clock.
T0, Timer/Counter0 counter source.
PCINT20: pin change interrupt source 20. The PD4 pin can serve as an external interrupt source.
• INT1/OC2B/PCINT19 – Port D, Bit 3
INT1, external interrupt source 1: The PD3 pin can serve as an external interrupt source.
OC2B, output compare match output: The PD3 pin can serve as an external output for the Timer/Counter0 compare match
B. The PD3 pin has to be configured as an output (DDD3 set (one)) to serve this function. The OC2B pin is also the output
pin for the PWM mode timer function.
PCINT19: pin change interrupt source 19. The PD3 pin can serve as an external interrupt source.
• INT0/PCINT18 – Port D, Bit 2
INT0, external interrupt source 0: The PD2 pin can serve as an external interrupt source.
PCINT18: pin change interrupt source 18. The PD2 pin can serve as an external interrupt source.
• TXD/PCINT17 – Port D, Bit 1
TXD, transmit data (data output pin for the USART). When the USART transmitter is enabled, this pin is configured as an
output regardless of the value of DDD1.
PCINT17: pin change interrupt source 17. The PD1 pin can serve as an external interrupt source.
• RXD/PCINT16 – Port D, Bit 0
RXD, receive data (data input pin for the USART). When the USART receiver is enabled this pin is configured as an input
regardless of the value of DDD0. When the USART forces this pin to be an input, the pull-up can still be controlled by the
PORTD0 bit.
PCINT16: pin change interrupt source 16. The PD0 pin can serve as an external interrupt source.
Table 10-10 and Table 10-11 on page 71 relate the alternate functions of Port D to the overriding signals shown in
Figure 10-5 on page 62.
Table 10-10. Overriding Signals for Alternate Functions PD7..PD4
Signal Name PD7/AIN1/PCINT23 PD6/AIN0/OC0A/PCINT22 PD5/T1/OC0B/PCINT21 PD4/XCK/T0/PCINT20
PUOE 0 0 0 0
PUO 0 0 0 0
DDOE 0 0 0 0
DDOV 0 0 0 0
PVOE 0 OC0A ENABLE OC0B ENABLE UMSEL
PVOV 0 OC0A OC0B XCK OUTPUT
DIEOE PCINT23 × PCIE2 PCINT22 × PCIE2 PCINT21 × PCIE2 PCINT20 × PCIE2
DIEOV 1 1 1 1
DI PCINT23 INPUT PCINT22 INPUT
PCINT21 INPUT
T1 INPUT
PCINT20 INPUT
XCK INPUT
T0 INPUT
AIO AIN1 INPUT AIN0 INPUT – –