Datasheet

39
ATmega48/88/168 Automotive [DATASHEET]
7530K–AVR–07/14
Figure 8-1. Reset Logic
8.3 Power-on Reset
A power-on reset (POR) pulse is generated by an on-chip detection circuit. The detection level is defined in
Table 8-1 on page 40. The POR is activated whenever V
CC
is below the detection level. The POR circuit can be used to
trigger the start-up Reset, as well as to detect a failure in supply voltage.
A power-on reset (POR) circuit ensures that the device is reset from power-on. Reaching the power-on reset threshold
voltage invokes the delay counter, which determines how long the device is kept in RESET after V
CC
rise. The RESET signal
is activated again, without any delay, when V
CC
decreases below the detection level.
Power-on Reset
Circuit
Brown-out
Reset Circuit
MCU Status
Register (MCUSR)
Reset Circuit
Pull-up Resistor
BODLEVEL [2 to 0]
S
Q
R
DATA BUS
CK
SUT[1:0]
CKSEL[3:0]
RSTDISBL
COUNTER RESET
INTERNAL RESET
TIMEOUT
SPIKE
FILTER
RESET
VCC
Delay Counters
Watchdog
Timer
Watchdog
Oscillator
Clock
Generator
PORF BORF
WDRF
EXTRF