Datasheet

ATmega48/88/168 Automotive [DATASHEET]
7530K–AVR–07/14
36
• Bit 5 - PRTIM0: Power Reduction Timer/Counter0
Writing a logic one to this bit shuts down the Timer/Counter0 module. When the Timer/Counter0 is enabled, operation will
continue like before the shutdown.
• Bit 4 - Res: Reserved bit
This bit is reserved in Atmel
®
ATmega48/88/168 and will always read as zero.
• Bit 3 - PRTIM1: Power Reduction Timer/Counter1
Writing a logic one to this bit shuts down the Timer/Counter1 module. When the Timer/Counter1 is enabled, operation will
continue like before the shutdown.
• Bit 2 - PRSPI: Power Reduction Serial Peripheral Interface
If using debugWIRE on-chip debug system, this bit should not be written to one. Writing a logic one to this bit shuts down the
serial peripheral interface by stopping the clock to the module. When waking up the SPI again, the SPI should be
re-initialized to ensure proper operation.
• Bit 1 - PRUSART0: Power Reduction USART0
Writing a logic one to this bit shuts down the USART by stopping the clock to the module. When waking up the USART
again, the USART should be re-initialized to ensure proper operation.
• Bit 0 - PRADC: Power Reduction ADC
Writing a logic one to this bit shuts down the ADC. The ADC must be disabled before shut down. The analog comparator
cannot use the ADC input MUX when the ADC is shut down.
7.8 Minimizing Power Consumption
There are several possibilities to consider when trying to minimize the power consumption in an AVR
®
controlled system. In
general, sleep modes should be used as much as possible, and the sleep mode should be selected so that as few as
possible of the device’s functions are operating. All functions not needed should be disabled. In particular, the following
modules may need special consideration when trying to achieve the lowest possible power consumption.
7.8.1 Analog to Digital Converter
If enabled, the ADC will be enabled in all sleep modes. To save power, the ADC should be disabled before entering any
sleep mode. When the ADC is turned off and on again, the next conversion will be an extended conversion. Refer to Section
21. “Analog-to-Digital Converter” on page 206 for details on ADC operation.
7.8.2 Analog Comparator
When entering idle mode, the analog comparator should be disabled if not used. When entering ADC noise reduction mode,
the analog comparator should be disabled. In other sleep modes, the analog comparator is automatically disabled. However,
if the analog comparator is set up to use the internal voltage reference as input, the analog comparator should be disabled in
all sleep modes. Otherwise, the internal voltage reference will be enabled, independent of sleep mode. Refer to
Section 20. “Analog Comparator” on page 203 for details on how to configure the analog comparator.
7.8.3 Brown-out Detector
If the brown-out detector is not needed by the application, this module should be turned off. If the brown-out detector is
enabled by the BODLEVEL fuses, it will be enabled in all sleep modes, and hence, always consume power. In the deeper
sleep modes, this will contribute significantly to the total current consumption. Refer to
Section 8.5 “Brown-out Detection” on page 41 for details on how to configure the brown-out detector.