Datasheet
ATmega48/88/168 Automotive [DATASHEET]
7530K–AVR–07/14
294
BST Rr, b Bit store from register to T T ← Rr(b) T 1
BLD Rd, b Bit load from T to register Rd(b) ← T None 1
SEC Set carry C ← 1 C 1
CLC Clear carry C ← 0 C 1
SEN Set negative flag N ← 1 N 1
CLN Clear negative flag N ← 0 N 1
SEZ Set zero flag Z ← 1 Z 1
CLZ Clear zero flag Z ← 0 Z 1
SEI Global interrupt enable I ← 1 I 1
CLI Global interrupt disable I ← 0 I 1
SES Set signed test flag S ← 1 S 1
CLS Clear signed test flag S ← 0 S 1
SEV Set twos complement overflow. V ← 1 V 1
CLV Clear twos complement overflow V ← 0 V 1
SET Set T in SREG T ← 1 T 1
CLT Clear T in SREG T ← 0 T 1
SEH Set half carry flag in SREG H ← 1 H 1
CLH Clear half carry flag in SREG H ← 0 H 1
Data Transfer Instructions
MOV Rd, Rr Move between registers Rd ← Rr None 1
MOVW Rd, Rr Copy register word Rd+1:Rd ← Rr+1:Rr None 1
LDI Rd, K Load immediate Rd ← K None 1
LD Rd, X Load indirect Rd ← (X) None 2
LD Rd, X+ Load indirect and post-inc. Rd ← (X), X ← X + 1 None 2
LD Rd, - X Load indirect and pre-dec. X ← X - 1, Rd ← (X) None 2
LD Rd, Y Load indirect Rd ← (Y) None 2
LD Rd, Y+ Load indirect and post-inc. Rd ← (Y), Y ← Y + 1 None 2
LD Rd, - Y Load indirect and pre-dec. Y ← Y - 1, Rd ← (Y) None 2
LDD Rd, Y+q Load indirect with displacement Rd ← (Y + q) None 2
LD Rd, Z Load indirect Rd ← (Z) None 2
LD Rd, Z+ Load indirect and post-inc. Rd ← (Z), Z ← Z+1 None 2
LD Rd, -Z Load indirect and pre-dec. Z ← Z - 1, Rd ← (Z) None 2
LDD Rd, Z+q Load indirect with displacement Rd ← (Z + q) None 2
LDS Rd, k Load direct from SRAM Rd ← (k) None 2
ST X, Rr Store indirect (X) ← Rr None 2
ST X+, Rr Store indirect and post-inc. (X) ← Rr, X ← X + 1 None 2
ST - X, Rr Store indirect and pre-dec. X ← X - 1, (X) ← Rr None 2
ST Y, R r Store indirect (Y) ← Rr None 2
ST Y+, Rr Store indirect and post-inc. (Y) ← Rr, Y ← Y + 1 None 2
ST - Y, Rr Store indirect and pre-dec. Y ← Y - 1, (Y) ← Rr None 2
STD Y+q, Rr Store indirect with displacement (Y + q) ← Rr None 2
30. Instruction Set Summary (Continued)
Mnemonics Operands Description Operation Flags #Clocks
Note: 1. These instructions are only available in Atmel
®
ATmega168.