Datasheet
289
ATmega48/88/168 Automotive [DATASHEET]
7530K–AVR–07/14
(0x79) ADCH ADC data register high byte 219
(0x78) ADCL ADC data register low byte 219
(0x77) Reserved
– – – – – – – –
(0x76) Reserved
– – – – – – – –
(0x75) Reserved
– – – – – – – –
(0x74) Reserved
– – – – – – – –
(0x73) Reserved
– – – – – – – –
(0x72) Reserved
– – – – – – – –
(0x71) Reserved
– – – – – – – –
(0x70) TIMSK2
– – – – – OCIE2B OCIE2A TOIE2 133
(0x6F) TIMSK1
– –ICIE1 – – OCIE1B OCIE1A TOIE1 117
(0x6E) TIMSK0
– – – – – OCIE0B OCIE0A TOIE0 91
(0x6D) PCMSK2 PCINT23 PCINT22 PCINT21 PCINT20 PCINT19 PCINT18 PCINT17 PCINT16 76
(0x6C) PCMSK1
– PCINT14 PCINT13 PCINT12 PCINT11 PCINT10 PCINT9 PCINT8 76
(0x6B) PCMSK0 PCINT7 PCINT6 PCINT5 PCINT4 PCINT3 PCINT2 PCINT1 PCINT0 76
(0x6A) Reserved
– – – – – – – –
(0x69) EICRA
– – – – ISC11 ISC10 ISC01 ISC00 73
(0x68) PCICR
– – – – – PCIE2 PCIE1 PCIE0
(0x67) Reserved
– – – – – – – –
(0x66) OSCCAL Oscillator calibration register 29
(0x65) Reserved
– – – – – – – –
(0x64) PRR PRTWI PRTIM2 PRTIM0
– PRTIM1 PRSPI
PRUSART
0
PRADC 35
(0x63) Reserved
– – – – – – – –
(0x62) Reserved
– – – – – – – –
(0x61) CLKPR CLKPCE
– – – CLKPS3 CLKPS2 CLKPS1 CLKPS0 31
(0x60) WDTCSR WDIF WDIE WDP3 WDCE WDE WDP2 WDP1 WDP0 46
0x3F (0x5F) SREG I T H S V N Z C 10
0x3E (0x5E) SPH
– – – – –
(SP10)
Figure 5
SP9 SP8 12
0x3D (0x5D) SPL SP7 SP6 SP5 SP4 SP3 SP2 SP1 SP0 12
0x3C (0x5C) Reserved
– – – – – – – –
0x3B (0x5B) Reserved
– – – – – – – –
0x3A (0x5A) Reserved
– – – – – – – –
29. Register Summary (Continued)
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page
Notes: 1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory
addresses should never be written.
2. I/O registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In
these registers, the value of single bits can be checked by using the SBIS and SBIC instructions.
3. Some of the status flags are cleared by writing a logical one to them. Note that, unlike most other AVR
®
, the CBI and
SBI instructions will only operate on the specified bit, and can therefore be used on registers containing such status
flags. The CBI and SBI instructions work with registers 0x00 to 0x1F only.
4. When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing
I/O registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The
ATmega48/88/168 is a complex microcontroller with more peripheral units than can be supported within the 64 location
reserved in opcode for the IN and OUT instructions. For the extended I/O space from 0x60 - 0xFF in SRAM, only the
ST/STS/STD and LD/LDS/LDD instructions can be used.
5. Only valid for Atmel
®
ATmega88/168