Datasheet

267
ATmega48/88/168 Automotive [DATASHEET]
7530K–AVR–07/14
Figure 27-1. 2-wire Serial Bus Timing
Setup time for STOP condition
f
SCL
≤ 100kHz
t
SU;STO
4.0 – µs
f
SCL
> 100kHz 0.6 – µs
Bus free time between a STOP and START
condition
f
SCL
≤ 100kHz
t
BUF
4.7 – µs
f
SCL
> 100kHz 1.3 – µs
Table 27-1. 2-wire Serial Bus Requirements (Continued)
Parameter Condition Symbol Min Max Unit
Notes: 1. In Atmel ATmega48/88/168, this parameter is characterized and not 100% tested.
2. Required only for f
SCL
> 100kHz.
3. C
b
= capacitance of one bus line in pF.
4. f
CK
= CPU clock frequency
5. This requirement applies to all ATmega48/88/168 2-wire serial interface operation. Other devices connected to the 2-
wire serial bus need only obey the general f
SCL
requirement.
6. The actual low period generated by the Atmel ATmega48/88/168 2-wire serial interface is (1/f
SCL
– 2/f
CK
), thus f
CK
must
be greater than 6MHz for the low time requirement to be strictly met at f
SCL
= 100kHz.
7. The actual low period generated by the ATmega48/88/168 2-wire serial interface is (1/f
SCL
– 2/f
CK
), thus the low time
requirement will not be strictly met for f
SCL
> 308kHz when f
CK
= 8MHz. Still, ATmega48/88/168 devices connected to
the bus may communicate at full speed (400kHz) with other ATmega48/88/168 devices, as well as any other device
with a proper t
LOW
acceptance margin.
t
of
t
SU,STA
t
SU,STO
t
HD,STA
t
BUF
t
HD,DAT
t
SU,DAT
t
HIGH
t
LOW
t
LOW
SCL
SDA
t
r