Datasheet

ATmega48/88/168 Automotive [DATASHEET]
7530K–AVR–07/14
244
The status of the fuse bits is not affected by chip erase. Note that the fuse bits are locked if lock bit1 (LB1) is programmed.
program the fuse bits before programming the lock bits.
Table 25-5. Extended Fuse Byte for ATmega88/168
Extended Fuse Byte Bit No Description Default Value
– 7 – 1
– 6 – 1
– 5 – 1
– 4 – 1
– 3 – 1
BOOTSZ1 2 Select boot size (see Table 113 for details) 0 (programmed)
(1)
BOOTSZ0 1 Select boot size (see Table 113 for details) 0 (programmed)
(1)
BOOTRST 0 Select reset vector 1 (unprogrammed)
Note: 1. The default value of BOOTSZ1..0 results in maximum boot size. See Table 25-8 on page 246 for details.
Table 25-6. Fuse High Byte
High Fuse Byte Bit No Description Default Value
RSTDISBL
(1)
7 External reset disable 1 (unprogrammed)
DWEN 6 debugWIRE enable 1 (unprogrammed)
SPIEN
(2)
5
Enable serial program and data
downloading
0 (programmed, SPI programming
enabled)
WDTON
(3)
4 Watchdog timer always on 1 (unprogrammed)
EESAVE 3
EEPROM memory is preserved
through the chip erase
1 (unprogrammed), EEPROM not
reserved
BODLEVEL2
(4)
2 Brown-out detector trigger level 1 (unprogrammed)
BODLEVEL1
(4)
1 Brown-out detector trigger level 1 (unprogrammed)
BODLEVEL0
(4)
0 Brown-out detector trigger level 1 (unprogrammed)
Notes: 1. See Section 10.3.3 “Alternate Functions of Port C” on page 67 for description of RSTDISBL fuse.
2. The SPIEN fuse is not accessible in serial programming mode.
3. See Section 8.9.1 “Watchdog Timer Control Register - WDTCSR” on page 46 for details.
4. See Table 8-2 on page 41 for BODLEVEL fuse decoding.
Table 25-7. Fuse Low Byte
Low Fuse Byte Bit No Description Default Value
CKDIV8
(4)
7 Divide clock by 8 0 (programmed)
CKOUT
(3)
6 Clock output 1 (unprogrammed)
SUT1 5 Select start-up time 1 (unprogrammed)
(1)
SUT0 4 Select start-up time 0 (programmed)
(1)
CKSEL3 3 Select clock source 0 (programmed)
(2)
CKSEL2 2 Select clock source 0 (programmed)
(2)
CKSEL1 1 Select clock source 1 (unprogrammed)
(2)
CKSEL0 0 Select clock source 0 (programmed)
(2)
Notes: 1. The default value of SUT1..0 results in maximum start-up time for the default clock source. See
Table 6-9 on page 28 for details.
2. The default setting of CKSEL3..0 results in internal RC oscillator at 8MHz. See Table 6-8 on page 28 for
details.
3. The CKOUT fuse allows the system clock to be output on PORTB0. See
Section 6.9 “Clock Output Buffer” on page 30 for details.
4. See Section 6.11 “System Clock Prescaler” on page 31 for details.