Datasheet

235
ATmega48/88/168 Automotive [DATASHEET]
7530K–AVR–07/14
Figure 24-3. Addressing the Flash During SPM
(1)
Note: 1. The different variables used in Figure 24-3 are listed in Table 24-8 on page 240.
24.7 Self-Programming the Flash
The program memory is updated in a page by page fashion. Before programming a page with the data stored in the
temporary page buffer, the page must be erased. The temporary page buffer is filled one word at a time using SPM and the
buffer can be filled either before the page erase command or between a page erase and a page write operation:
Alternative 1, fill the buffer before a page erase
Fill temporary page buffer
Perform a page erase
Perform a page write
Alternative 2, fill the buffer after page erase
Perform a page erase
Fill temporary page buffer
Perform a page write
If only a part of the page needs to be changed, the rest of the page must be stored (for example in the temporary page
buffer) before the erase, and then be rewritten. When using alternative 1, the boot loader provides an effective
read-modify-write feature which allows the user software to first read the page, do the necessary changes, and then write
back the modified data. If alternative 2 is used, it is not possible to read the old data while loading since the page is already
erased. The temporary page buffer can be accessed in a random sequence. It is essential that the page address used in
both the page erase and page write operation is addressing the same page. See Section 24.7.12 “Simple Assembly Code
Example for a Boot Loader” on page 238 for an assembly code example.
24.7.1 Performing Page Erase by SPM
To execute page erase, set up the address in the Z-pointer, write “X0000011” to SPMCSR and execute SPM within four
clock cycles after writing SPMCSR. The data in R1 and R0 is ignored. The page address must be written to PCPAGE in the
Z-register. Other bits in the Z-pointer will be ignored during this operation.
Page erase to the RWW section: The NRWW section can be read during the page erase.
Page erase to the NRWW section: The CPU is halted during the operation.
BIT
PAGEMSBPCMSB
ZPAGEMSBZPCMSB 0115
Z-REGISTER
PROGRAM
COUNTER
WORD ADDRESS
WITHIN PAGE
PAGE ADDRESS
WITHIN THE FLASH
0
PCWORDPCPAGE
02
01
00
PAGEEND
PCWORD [PAGEMSB:0]
Page
Program Memory
Instructions Word
Page