Datasheet

191
ATmega48/88/168 Automotive [DATASHEET]
7530K–AVR–07/14
Figure 19-13. Formats and States in the Master Transmitter Mode
S
Successfull
transmission
to a slave
receiver
Next transfer
started with a
repeated start
condition
Not acknowledge
received after the
slave address
Not acknowledge
received after a
data byte
Arbitration lost and
addressed as slave
From master to slave
Any number of data bytes
and their associated acknowledge bits
This number (contained in TWSR) corresponds
to a defined state of the 2-Wire Serial Bus.
The prescaler bits are zero or masked to zero
From slave to master
Arbitration lost in slave
address or data byte
SLA W
R
S
SLA W
AAP
AP R
MR
MT
DATA
ADATA
$08 $18
$20
$38
$28
AP
$30
$38
$10
A or A
Other master
continues
$68 $78
n
A
Other master
continues
To corresponding
states in slave mode
A or A
Other master
continues
$B0