Datasheet

ATmega48/88/168 Automotive [DATASHEET]
7530K–AVR–07/14
188
19.8 Transmission Modes
The TWI can operate in one of four major modes. These are named master transmitter (MT), master receiver (MR), slave
transmitter (ST) and slave receiver (SR). Several of these modes can be used in the same application. As an example, the
TWI can use MT mode to write data into a TWI EEPROM, MR mode to read the data back from the EEPROM. If other
masters are present in the system, some of these might transmit data to the TWI, and then SR mode would be used. It is the
application software that decides which modes are legal.
The following sections describe each of these modes. Possible status codes are described along with figures detailing data
transmission in each of the modes. These figures contain the following abbreviations:
S: START condition
Rs: REPEATED START condition
R: Read bit (high level at SDA)
W: Write bit (low level at SDA)
A: Acknowledge bit (low level at SDA)
A
: Not acknowledge bit (high level at SDA)
Data: 8-bit data byte
P: STOP condition
SLA: Slave address
In Figure 19-13 on page 191 to Figure 19-19 on page 200, circles are used to indicate that the TWINT flag is set. The
numbers in the circles show the status code held in TWSR, with the prescaler bits masked to zero. At these points, actions
must be taken by the application to continue or complete the TWI transfer. The TWI transfer is suspended until the TWINT
flag is cleared by software.
When the TWINT flag is set, the status code in TWSR is used to determine the appropriate software action. For each status
code, the required software action and details of the following serial transfer are given in Table 19-4 on page 190 to
Table 19-7 on page 199. Note that the prescaler bits are masked to zero in these tables.
19.8.1 Master Transmitter Mode
In the master transmitter mode, a number of data bytes are transmitted to a slave receiver (see Figure 19-12 on page 189).
In order to enter a master mode, a START condition must be transmitted. The format of the following address packet
determines whether master transmitter or master receiver mode is to be entered. If SLA+W is transmitted, MT mode is
entered, if SLA+R is transmitted, MR mode is entered. All the status codes mentioned in this section assume that the
prescaler bits are zero or are masked to zero
6
wait3:
in r16,TWCR
sbrs r16,TWINT
rjmp wait3
while (!(TWCR & (1<<TWINT)))
;
Wait for TWINT flag set. This
indicates that the DATA has
been transmitted, and
ACK/NACK has been received.
7
in r16,TWSR
andi r16, 0xF8
cpi r16, MT_DATA_ACK
brne ERROR
if ((TWSR & 0xF8) !=
MT_DATA_ACK)
ERROR();
Check value of TWI status
register. Mask prescaler bits. If
status different from
MT_DATA_ACK go to ERROR
ldi r16,
(1<<TWINT)|(1<<TWEN)|
1<<TWSTO)
out TWCR, r16
TWCR = (1<<TWINT)|(1<<TWEN)|
(1<<TWSTO);
Transmit STOP condition
Table 19-3. Code Example (Continued)
No. Assembly Code Example C Example Comments