Datasheet

153
ATmega48/88/168 Automotive [DATASHEET]
7530K–AVR–07/14
17.5.2 Sending Frames with 9 Data Bit
If 9-bit characters are used (UCSZn = 7), the ninth bit must be written to the TXB8 bit in UCSRnB before the low byte of the
character is written to UDRn. The following code examples show a transmit function that handles 9-bit characters. For the
assembly code, the data to be sent is assumed to be stored in registers R17:R16.
Notes: 1. These transmit functions are written to be general functions. They can be optimized if the contents of the
UCSRnB is static. For example, only the TXB8 bit of the UCSRnB register is used after initialization.
2. The example code assumes that the part specific header file is included.
For I/O registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI” instructions must
be replaced with instructions that allow access to extended I/O. Typically “LDS” and “STS” combined with
“SBRS”, “SBRC”, “SBR”, and “CBR”.
The ninth bit can be used for indicating an address frame when using multi processor communication mode or for other
protocol handling as for example synchronization.
17.5.3 Transmitter Flags and Interrupts
The USART transmitter has two flags that indicate its state: USART data register empty (UDREn) and transmit complete
(TXCn). Both flags can be used for generating interrupts.
The data register empty (UDREn) flag indicates whether the transmit buffer is ready to receive new data. This bit is set when
the transmit buffer is empty, and cleared when the transmit buffer contains data to be transmitted that has not yet been
moved into the shift register. For compatibility with future devices, always write this bit to zero when writing the UCSRnA
register.
When the data register empty interrupt enable (UDRIEn) bit in UCSRnB is written to one, the USART data register empty
interrupt will be executed as long as UDREn is set (provided that global interrupts are enabled). UDREn is cleared by writing
UDRn. When interrupt-driven data transmission is used, the data register empty interrupt routine must either write new data
to UDRn in order to clear UDREn or disable the data register empty interrupt, otherwise a new interrupt will occur once the
interrupt routine terminates.
The transmit complete (TXCn) flag bit is set one when the entire frame in the transmit shift register has been shifted out and
there are no new data currently present in the transmit buffer. The TXCn flag bit is automatically cleared when a transmit
complete interrupt is executed, or it can be cleared by writing a one to its bit location.
Assembly Code Example
(1)(2)
USART_Transmit:
; Wait for empty transmit buffer
sbis UCSRnA,UDREn
rjmp USART_Transmit
; Copy 9th bit from r17 to TXB8
cbi UCSRnB,TXB8
sbrc r17,0
sbi UCSRnB,TXB8
; Put LSB data (r16) into buffer, sends the data
out UDRn,r16
ret
C Code Example
(1)(2
void USART_Transmit( unsigned int data )
{
/* Wait for empty transmit buffer */
while ( !( UCSRnA & (1<<UDREn))) )
;
/* Copy 9th bit to TXB8 */
UCSRnB &= ~(1<<TXB8);
if ( data & 0x0100 )
UCSRnB |= (1<<TXB8);
/* Put data into buffer, sends the data */
UDRn = data;
}