Datasheet

ATmega48/88/168 Automotive [DATASHEET]
7530K–AVR–07/14
138
16. Serial Peripheral Interface – SPI
The serial peripheral interface (SPI) allows high-speed synchronous data transfer between the Atmel
®
ATmega48/88/168
and peripheral devices or between several AVR
®
devices. The Atmel ATmega48/88/168 SPI includes the following features:
● Full-duplex, three-wire synchronous data transfer
● Master or slave operation
● LSB first or MSB first data transfer
● Seven programmable bit rates
● End of transmission interrupt flag
● Write collision flag protection
● Wake-up from idle mode
● Double speed (CK/2) master SPI mode
The USART can also be used in master SPI mode, see Section 18. “USART in SPI Mode” on page 168. The PRSPI bit in
Section 7.7.1 “Power Reduction Register - PRR” on page 35 must be written to zero to enable SPI module.
Figure 16-1. SPI Block Diagram
(1)
Note: 1. Refer to Figure 1-1 on page 3, and Table 10-3 on page 64 for SPI pin placement.
8-Bit Shift Register
Read Data Buffer
SPI Control RegisterSPI Status Register
MSTR
SPI Clock (Master)
SPE
SPI Control
SPI Interrupt
Request
Select
Clock
Logic
MISO
Clock
8
88
S
M
S
M
M
S
MSB LSB
SPIE SPE
WCOL SPIF SPI2X
SPI2X SPR1
MSTR SPE DORD
SPR0
DORD MSTR CPOL CPHA SPR1 SPR0
MOSI
SCK
SS
Divider
/2/4/8/16/32/64/128
XTAL
Internal
Data Bus
Pin
Control
Logic