Datasheet

137
ATmega48/88/168 Automotive [DATASHEET]
7530K–AVR–07/14
15.10.1 General Timer/Counter Control Register – GTCCR
• Bit 1 – PSRASY: Prescaler Reset Timer/Counter2
When this bit is one, the Timer/Counter2 prescaler will be reset. This bit is normally cleared immediately by hardware. If the
bit is written when Timer/Counter2 is operating in asynchronous mode, the bit will remain one until the prescaler has been
reset. The bit will not be cleared by hardware if the TSM bit is set. Refer to the description of the
Section • “Bit 7 – TSM: Timer/Counter Synchronization Mode” on page 93 for a description of the Timer/Counter
synchronization mode.
Bit 7 6 5 4 3 2 1 0
TSM
– – – – – PSRASY
PSRSYN
C
GTCCR
Read/Write R/W R R R R R R/W R/W
Initial Value 0 0 0 0 0 0 0 0